β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

Abstract

In this article, we report on the fabrication of β-Ga 2 O 3 pseudo-CMOS inverters using enhancementmode (E-mode) β-Ga 2 O 3 single-finger (S F ) and multifinger (M F ) thin-film transistors (TFTs). Initially, single-stage monolithic inverter ICs were fabricated using TFTs having threshold voltages V SF th = 0.6 V and V MF th = 0.1 V. However, the single-stage inverter yielded poorer gain (4.50 at V DD , supply voltage = 3 V). Alternatively, a pseudo-CMOS (double-stage) inverter was designed and fabricated, yielding a maximum gain of 6.45 but with a poor noise margin (NM). To improve the NM, the pseudo-CMOS circuit was tested using TFTs having higher threshold voltages (V SF th = 1.85 V and V MF th = 1.75 V). Notably, the optimized pseudo-CMOS circuit exhibited the least peak power consumption (0.2 nW) and the maximum gain of 8 at V DD = 3 V. The monolithically integrated devices' performance and IC highlight this technology's remarkable potential for application in the emerging sector of power electronics and extreme-environment electronics.Index Terms-β-Ga 2 O 3 heteroepitaxy, β-Ga 2 O 3 thin-film transistors (TFTs), inverter logic circuits, pseudo-CMOS. I. INTRODUCTIONβ -Ga 2 O 3 , an emerging ultrawide-bandgap (UWBG) material with a bandgap of 4.8 eV and a large breakdown field of 8 MV/cm, is a promising candidate for high-power electronics [1]. Furthermore, the availability of high-quality β-Ga 2 O 3 substrates promoted the entry of β-Ga 2 O 3 electronics into the market [2]. In addition to power electronics, UWBG CMOS circuits are highly desirable for extreme-environment