The design and verification of a high-performance low-control-overhead asynchronous differential equation solver

We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs)-representations of logic functions factored recursively with respect to input variables-on extended burst-mode asynchronous synthesis. First, this method guarantees that there exists a hazard-free BDD-based implementation for every legal extended burst-mode specification. Second, it reduces the constraints on state minimization and assignment, which reduces the number of additional state variables required in many cases. Third, in cases where conditional signals are sampled, it eliminates the need for state variable changes preceding output changes, which reduces overall input to output latency. Finally, we describe a circuit that exemplifies how the BDD variable ordering affects the path delay.

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The design and verification of a high-performance low-control-overhead asynchronous differential equation solver

Cited by 31 publications

References 20 publications

Performance Analysis of Asynchronous Circuits Using Markov Chains

Performance Analysis of Asynchronous Circuits Using Markov Chains

Performance Analysis of Comparator for IoT Applications

BDD-based synthesis of extended burst-mode controllers

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