Testing for Missing-Gate Faults in Reversible Circuits

Hayes, John P.; Polian, Ilia; Becker, Bernd

doi:10.1109/ats.2004.84

Cited by 91 publications

(64 citation statements)

References 6 publications

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“…Punishment for flouting of the restriction was death. 7 Roy, Taiwan: A Political History, pp [15][16][17] Dutch rule was begun with the defeat of Spanish forces on Taiwan near modern day Tamsui in 1644. Dutch East Indies Company troops would be garrisoned at present day Tainan at the Casteel Zeelandia abutting the city's harbor.…”

Section: Abramson Gunnarmentioning

confidence: 99%

“…The eigenvalues of a fault impacting the phase of a qubit will rotate the phase based on the eigenvalues of the fault. The interesting fault model of gate removal originates from Hayes et al who applied it to remove entire gates such as Toffoli gates in reversible circuits [16]. We believe however that this model is more adequate to single pulses and not gates composed of many pulses.…”

Section: Modelling Errorsmentioning

confidence: 99%

“…16 The government still felt impelled by public demand to gain some territory after hostilities ended. It was believed that Taiwan could be taken without incurring Western intervention.…”

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confidence: 99%

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2005

McNair Scholars Online Journal

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The Ronald E. McNair Scholars Program at Portland State University (PSU) works with motivated and talented undergraduates who want to pursue PhDs. It introduces juniors and seniors who are first-generation and lowincome, and/or members of under-represented groups to academic research and to effective strategies for getting into and graduating from PhD programs.The McNair Scholars Program has academic-year activities and a full-time summer research internship. Scholars take academic and skills-building seminars and workshops during the year, and each scholar works closely with a faculty mentor on original research in the summer. Scholars present their research findings at the McNair Summer Symposium and at other conferences, and are encouraged to publish their papers in the McNair Journal and other scholarly publications.The Ronald E. McNair Post-baccalaureate Achievement Program was established in 1986 by the U.S. Department of Education and named in honor of Challenger Space Shuttle astronaut Dr. Ronald E. McNair. The program, which is in its seventh year on campus, is funded by a $924,000 grant from the U.S. Department of Education and institutional cost-share funds.The McNair Scholars Program's student-centered approach relies heavily on faculty and university commitment. While working as a staff physicist with Hughes Research Laboratory, Dr. McNair soon became a recognized expert in laser physics. His many distinctions include being a Presidential Scholar (1971-74), a Ford Foundation Fellow (1971-74), a National Fellowship Fund Fellow (1974, and a NATO Fellow (1975). He was also a sixth degree black belt in karate and an accomplished saxophonist. Because of his many accomplishments, he was selected by NASA for the space shuttle program in 1978. His first space shuttle mission launched successfully from Kennedy Space Center on February 3, 1984. Dr. Ronald E. McNair was the second African American to fly in space. Two years later he was selected to serve as mission specialist aboard the ill-fated U.S. Challenger space shuttle. He was killed instantly when the Challenger exploded one minute, thirteen seconds after it was launched. Dr. McNair was posthumously awarded the Congressional Space Medal of Honor. After his death in the Challenger Space Shuttle accident on January 28, 1986, members of Congress provided funding for the Ronald E. McNair Post-Baccalaureate Achievement Program. Their goal was to encourage low-income and first-generation college students, and students from historically underrepresented ethnic groups to expand their educational opportunities by enrolling in a Ph.D. program and ultimately pursue an academic career. This program is dedicated to the high standards of achievement inspired by Dr. McNair's life. Terrel L. Rhodes, Principal InvestigatorDr. Rhodes is the Vice Provost for Curriculum and Dean of Undergraduate Studies at Portland State University. As such, he acts as dean of general education, oversees the undergraduate curriculum process, serves as the institutional liaison for accr...

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Section: Abramson Gunnarmentioning

confidence: 99%

Section: Modelling Errorsmentioning

confidence: 99%

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2005

McNair Scholars Online Journal

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“…In [44], all of the Toffoli gates are replaced by extended Toffoli gates, and two sets of CNOT gates and one additional parity line are added to the original circuit to achieve online testability for single line faults. In [45], a DFT-(design for testability-) based offline approach is proposed for detecting single missing gate faults. In [46], an online fault detection approach is proposed for detecting single missing gate faults.…”

Section: Related Work On Testing Of Reversible Combinationalmentioning

confidence: 99%

First Steps in Creating Online Testable Reversible Sequential Circuits

Khan

Rice

2018

VLSI Design

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Synthesis of reversible sequential circuits is a very new research area. It has been shown that such circuits can be implemented using quantum dot cellular automata. Other work has used traditional designs for sequential circuits and replaced the flip-flops and the gates with their reversible counterparts. Our earlier work uses a direct feedback method without any flip-flops, improving upon the replacement technique in both quantum cost and ancilla inputs. We present here a further improved version of the direct feedback method. Design examples show that the proposed method produces better results than our earlier method in terms of both quantum cost and ancilla inputs. We also propose the first technique for online testing of single line faults in sequential reversible circuits.

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“…A major goal is thereby to keep the size of the testset as small as possible. First approaches follow thereby a greedy and branch-andbound scheme [18] or applied ILP formulations [19]. ATPG approaches that can handle large circuits make use of formals methods like Boolean satisfiability [20] or Pseudo Boolean Optimization [21].…”

Section: Introductionmentioning

confidence: 99%

Fault Ordering for Automatic Test Pattern Generation of Reversible Circuits

Wille

Zhang

Drechsler

2013

2013 IEEE 43rd International Symposium on Multiple-Valued Logic

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Abstract-Reversible circuits are an attractive computation alternative as they build the basis for many emerging technologies such as quantum computation or low power design. Since first physical realizations of reversible circuits have already been presented in the past, how to efficiently test such circuits became a current research topic. Consequently, several approaches for Automatic Test Pattern Generation (ATPG) have been presented in the past.However, the order in which the respective faults are targeted has a significant effect on the resulting test size. While determining good fault orderings has intensely been considered for the test of conventional circuits, according strategies for reversible circuits have not been evaluated yet. This is done in this paper. To this end, a fault ordering scheme is presented that explicitely exploits the reversibility of the underlying circuits. Experimental results show that the proposed scheme leads to improvements of up to 65% in the size of the testset.

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Testing for Missing-Gate Faults in Reversible Circuits

Cited by 91 publications

References 6 publications

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First Steps in Creating Online Testable Reversible Sequential Circuits

Fault Ordering for Automatic Test Pattern Generation of Reversible Circuits

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