Temperature- and Supply Voltage-Independent Time References for Wireless Sensor Networks

Smedt, Valentijn De; Gielen, Georges; Dehaene, Wim

doi:10.1007/978-3-319-09003-0

Cited by 7 publications

(5 citation statements)

References 204 publications

(478 reference statements)

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“…Apart from the increasing level of integration in digital and lowpower (IoT) applications during the last decades, a similar trend is observed in power systems [1], [2]. A huge benefit emerges when a complete power system, consisting of control logic, signal processing and power stages, can be integrated in a System in a Package (SiP) [3] or even a single-chip System-on-Chip (SoC).…”

Section: Introductionmentioning

confidence: 84%

A 650 V, 3 A three-phase fully-integrated BLDC motor driver with charge pump and level shifters

Smedt¹,

Thoné²,

Wens³

2016

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference

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A 650 V three-phase IGBT motor driver is presented in this article. Apart from the power transistors and predrivers, also freewheeling diodes are present in the output power stage to drive inductive loads. The 15 V overdrive voltage as well as all other floating supplies are generated on-chip by means of a charge pump and cascoded current mirrors. The input signals for all switches are at ground level and level-shifted internally. Each half-bridge is able to switch at 20 kHz a 1.5 A current at 600 V and a 3 A current at 300 V. The ground connection contains a current shunt and a sense-amplifier, which can be used as a feedback signal in the BLDC control loop. The system is implemented in a 1 µm SoI technology with 650 V IGBT transistors.

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Section: Introductionmentioning

confidence: 84%

A 650 V, 3 A three-phase fully-integrated BLDC motor driver with charge pump and level shifters

Smedt¹,

Thoné²,

Wens³

2016

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference

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“…A commonly used theory to understand translation of white and colored noise sources in oscillator circuits is the Linear-Time-Variant (LTV) noise theory of Hajimiri [13][14][15]. In this theory, noise is modeled as a current source injecting pulses on the different nodes of the oscillator, as depicted in Figure 1.…”

Section: Time Dependent Effects In Oscillatorsmentioning

confidence: 99%

“…In a ring oscillator, the state variables f i can be considered to be the node voltages at the output of each stage. After all, a state variable is an independent memory state in the system: a current through an inductor or a voltage across a (parasitic) capacitance [15]. In this case, the ISF for a pulse injected at the output node of stage i of an n-stage oscillator can be written as:…”

Section: Calculation Of the Isfmentioning

confidence: 99%

Single Event Transients in CMOS Ring Oscillators

Prinzie

Smedt

2019

Electronics

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In this paper, a time-variant analysis is made on Single-Event Transients (SETs) in integrated CMOS ring oscillators. The Impulse Sensitive Function (ISF) of the oscillator is used to analyze the impact of the relative moment when a particle hits the circuit. The analysis is based on simulations and verified experimentally with a Two-Photon Absorption (TPA) laser setup. The experiments are done using a 65 nm CMOS test chip.

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“…RFID technology integrates portable wireless devices in order to detect both the nature and the precise location of physical objects or persons [1,2]. The RIFD reader contributes to transmitting the information and energy into the RFID tag where the tag is responsible for providing feedback to the RFID reader for any kind of inquiry [3].…”

Section: Introductionmentioning

confidence: 99%

“…Ileakage α e (Vgs − Vt)/Vth , (1) where Vt is the thermal potential. It is clear from Equation (1) that the leakage current is exponential proportional to the threshold voltage.…”

Section: Introductionmentioning

confidence: 99%

Low Power High-Efficiency Shift Register Using Implicit Pulse-Triggered Flip-Flop in 130 nm CMOS Process for a Cryptographic RFID Tag

et al. 2016

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Abstract:The shift register is a type of sequential logic circuit which is mostly used for storing digital data or the transferring of data in the form of binary numbers in radio frequency identification (RFID) applications to improve the security of the system. A power-efficient shift register utilizing a new flip-flop with an implicit pulse-triggered structure is presented in this article. The proposed flip-flop has features of high performance and low power. It is composed of a sampling circuit implemented by five transistors, a C-element for rise and fall paths, and a keeper stage. The speed is enhanced by executing four clocked transistors together with a transition condition technique. The simulation result confirms that the proposed topology consumes the lowest amounts of power of 30.1997 and 22.7071 nW for parallel in -parallel out (PIPO) and serial in -serial out (SISO) shift register respectively covering 22 µm 2 chip area. The overall design consist of only 16 transistors and is simulated in 130 nm complementary-metal-oxide-semiconductor (CMOS) technology with a 1.2 V power supply.

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Temperature- and Supply Voltage-Independent Time References for Wireless Sensor Networks

Cited by 7 publications

References 204 publications

A 650 V, 3 A three-phase fully-integrated BLDC motor driver with charge pump and level shifters

A 650 V, 3 A three-phase fully-integrated BLDC motor driver with charge pump and level shifters

Single Event Transients in CMOS Ring Oscillators

Low Power High-Efficiency Shift Register Using Implicit Pulse-Triggered Flip-Flop in 130 nm CMOS Process for a Cryptographic RFID Tag

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