Technologies for rapid prototyping of multi-chip modules

Topology for Substrate Routing in Semiconductor Package Design

“…All of these proposal are based on routers that subdivide each routing layer into a grid and are improvements and generalizations on maze routers [8,27,28]. Grid-based maze routers and solutions based on them suffer under difficulties related to the large number of grid points one needs to store during the routing process, especially in 3-dimensional multi-layered routing problems.…”

Rapid prototyping of multi-chip modules

“…The second effect is reduced routability, due t o the constraint of having to choose among pre-arranged wiring resources in constructing the integral interconnect nets. We have shown in one realistic example that our semi-custom design requires an additional 3% wire compared t o the fully custom solution [3]. Adding these two components together, we see that the semicustom approach leads to only 5-6% more wire than the custom solution.…”

“…We have developed a router that can select which prefabricated wire segments are to be incorporated into each net, in the process identifying the corresponding laser operations [3]. We envision a scenario in which the netliit is then transmitted to the laser customization tool, where the sequence of laser operations would be performed to form all nets.…”