In this work, an in situ SiO
2
passivation technique
using atomic layer deposition (ALD) during the growth of gate dielectric
TaSiO
x
on solid-source molecular beam
epitaxy grown (100)In
x
Ga
1–
x
As and (110)In
x
Ga
1–
x
As on InP substrates is reported.
X-ray reciprocal space mapping demonstrated quasi-lattice matched
In
x
Ga
1–
x
As epitaxy on crystallographically oriented InP substrates. Cross-sectional
transmission electron microscopy revealed sharp heterointerfaces between
ALD TaSiO
x
and (100) and (110)In
x
Ga
1–
x
As epilayers,
wherein the presence of a consistent growth of an ∼0.8 nm intentionally
formed SiO
2
interfacial passivating layer (IPL) is also
observed on each of (100) and (110)In
x
Ga
1–
x
As. X-ray photoelectron spectroscopy
(XPS) revealed the incorporation of SiO
2
in the composite
TaSiO
x
, and valence band offset (Δ
E
V
) values for TaSiO
x
relative to (100) and (110)In
x
Ga
1–
x
As orientations of 2.52 ± 0.05
and 2.65 ± 0.05 eV, respectively, were extracted. The conduction
band offset (Δ
E
C
) was calculated
to be 1.3 ± 0.1 eV for (100)In
x
Ga
1–
x
As and 1.43 ± 0.1 eV for (110)In
x
Ga
1–
x
As,
using TaSiO
x
band gap values of 4.60 and
4.82 eV, respectively, determined from the fitted O 1s XPS loss spectra,
and the literature-reported composition-dependent In
x
Ga
1–
x
As band gap. The in
situ passivation of In
x
Ga
1–
x
As using SiO
2
IPL during ALD of TaSiO
x
and the relatively large Δ
E
V
and Δ
E
C
values
reported in this work are expected to aid in the future development
of thermodynamically stable high-κ gate dielectrics on In
x
Ga
1–
x
As
with reduced gate leakage, particularly under low-power device operation.