T/R RF Switch with 150 ns Switching Time and over 100 dBc IMD for Wideband Mobile Applications in Thick Oxide SOI Process

Abstract

This paper presents a fast-switching Transmit/Receive (T/R) Single-Pole-Double-Throw (SPDT) Radio Frequency (RF) switch. Thorough analyses have been conducted to choose the optimum number of stacks, transistor sizes, gate and body voltages, to satisfy the required specifications. This switch applies six stacks of series and shunt transistors as big as 3.9 mm/160 nm and 0.75 mm/160 nm, respectively. A negative charge pump and a voltage booster generate the negative and boosted control voltages to improve the harmonics and to keep Inter-Modulation Distortion (IMD) performance of the switch over 100 dBc. A Low Drop-Out (LDO) regulator limits the boosted voltage in Absolute Maximum Rating (AMR) conditions and improves the switch performance for Process, Voltage and Temperature (PVT) variations. To reduce the size, a dense custom-made capacitor consisting of different types of capacitors has been presented where they have been placed over each other in layout considering the Design Rule Checks (DRC) and applied in negative charge pump, voltage booster and LDO. This switch has been fabricated and tested in a 90 nm Silicon-on-Insulator (SOI) process. The second and third IMD for all specified blockers remain over 100 dBc and the switching time as fast as 150 ns has been achieved. The Insertion Loss (IL) and isolation at 2.7 GHz are −0.17 dB and −33 dB, respectively. This design consumes 145 uA from supply voltage range of 1.65 V to 1.95 V and occupies 440 × 472 µm2 of die area.

High-Powered RF SOI Switch With Fast Switching Time for TDD Mobile Applications

“…As shown in Table 3, the measurement results of the proposed SPDT switch are summarized and compared to stateof-the-art SPDT switches. References with faster switching VOLUME 11, 2023 times than this work have lower power handling capabilities [2], [3], [10]. If these references increase the number of stacked transistors to improve the power handling capability, not only increase the insertion loss, but also slow down the switching time correspondingly.…”

“…As the switching time of the antenna switch becomes important, methods for improving the switching time have been proposed. To reduce the switching time, reference [2] and [3] proposed the methods that are optimizing or using complex analog circuits with the reduced gate biasing resistors. Reference [2] optimized the transistor size of the logic driver and reduced the gate biasing resistors.…”

“…Reference [2] optimized the transistor size of the logic driver and reduced the gate biasing resistors. For fast switching time, reference [3] used high operating voltage of ''3 V'' that is higher than the supplied voltage of 1.8 V. But, to make high operating voltage of 3 V, a low dropout (LDO) circuit and a charge pump circuit should be added inevitably. And reference [3] also used the reduced gate biasing resistors for the purpose simultaneously.…”

“…For fast switching time, reference [3] used high operating voltage of ''3 V'' that is higher than the supplied voltage of 1.8 V. But, to make high operating voltage of 3 V, a low dropout (LDO) circuit and a charge pump circuit should be added inevitably. And reference [3] also used the reduced gate biasing resistors for the purpose simultaneously. Since these both methods reduced the gate biasing resistors for fast switching time, however, the insertion loss and 2nd harmonic are unfortunately degraded accordingly.…”

A High Performance 0.18 μm RF Switch for Multi-Standard

“…In addition to the optimization of RF switches alone, there are some works that design RF switches together with other modules, such as ESD [23,24], antenna [13], impedance matching networks [12] and NVG [25][26][27]. The performance of RF switches in these works is not outstanding, but the whole module can achieve good performance.…”