2001
DOI: 10.1109/92.974889
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Synthesis of hardware models in C with pointers and complex data structures

Abstract: One of the greatest challenges in a C/C++-based design methodology is efficiently mapping C/C++ models into hardware. Many networking and multimedia applications implemented in hardware or mixed hardware/software systems now use complex data structures stored in multiple memories, so many C/C++ features that were originally designed for software applications are now making their way into hardware. Such features include dynamic memory allocation and pointers for managing data. We present a solution for efficien… Show more

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Cited by 69 publications
(53 citation statements)
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“…C models that include dynamic memory allocation, pointers and the functions malloc and free are mapped onto hardware in (Semeria et al, 2001). The SpC tool which was developed in this work resolves pointer variables at compile time and thus C functional models are synthesized into Verilog hardware models.…”
Section: Next Generation High-level Synthesis Toolsmentioning
confidence: 99%
“…C models that include dynamic memory allocation, pointers and the functions malloc and free are mapped onto hardware in (Semeria et al, 2001). The SpC tool which was developed in this work resolves pointer variables at compile time and thus C functional models are synthesized into Verilog hardware models.…”
Section: Next Generation High-level Synthesis Toolsmentioning
confidence: 99%
“…• Only static memory allocation is allowed: Dynamic memory allocation (via calls to malloc() and free()) requires a memory allocation unit and a shared memory [74], which is undesirable.…”
Section: Conversion Approachmentioning
confidence: 99%
“…C programs that include dynamic memory allocation, pointers and the functions malloc and free are mapped onto specific hardware in [9]. The SpC tool [9] takes a C function with complex data structures and generates a Verlog model.…”
Section: Related Workmentioning
confidence: 99%
“…The SpC tool [9] takes a C function with complex data structures and generates a Verlog model. The different techniques and optimizations described above have been implemented using the SUIF compiler environment [10].…”
Section: Related Workmentioning
confidence: 99%