Synthesis of hardware models in C with pointers and complex data structures

Abstract

One of the greatest challenges in a C/C++-based design methodology is efficiently mapping C/C++ models into hardware. Many networking and multimedia applications implemented in hardware or mixed hardware/software systems now use complex data structures stored in multiple memories, so many C/C++ features that were originally designed for software applications are now making their way into hardware. Such features include dynamic memory allocation and pointers for managing data. We present a solution for efficiently mapping arbitrary C code with pointers and malloc/free into hardware. Our solution, which fits current memory management methodologies, instantiates an application-specific hardware memory allocator coupled with a memory architecture. Our work also supports the resolution of pointers without restriction on the data structures. We present an implementation based on the SUIF framework along with case studies such as the realization of a video filter and an ATM segmentation engine.

High-Level Synthesis for Embedded Systems

“…C models that include dynamic memory allocation, pointers and the functions malloc and free are mapped onto hardware in (Semeria et al, 2001). The SpC tool which was developed in this work resolves pointer variables at compile time and thus C functional models are synthesized into Verilog hardware models.…”

Power-Aware Architecting for data-dominated applications

“…• Only static memory allocation is allowed: Dynamic memory allocation (via calls to malloc() and free()) requires a memory allocation unit and a shared memory [74], which is undesirable.…”

Seamless Signal Processing Block Implementation Using the Cubed-C Design Environment

“…C programs that include dynamic memory allocation, pointers and the functions malloc and free are mapped onto specific hardware in [9]. The SpC tool [9] takes a C function with complex data structures and generates a Verlog model.…”

“…The SpC tool [9] takes a C function with complex data structures and generates a Verlog model. The different techniques and optimizations described above have been implemented using the SUIF compiler environment [10].…”