Switching Performance of Epitaxially Grown Normally-Off 4H-SiC JFET

Abstract

Static and dynamic behavior of the epitaxially grown dual gate trench 4H-SiC junction field effect transistor (JFET) is investigated. Typical on-state resistance Ron was 6 – 10mΩcm2 at VGS = 2.5V and the breakdown voltage between the range of 1.5 – 1.8kV was realized at VGS = −5V for normally-off like JFETs. It was found that the turn-on energy delivers the biggest part of the switching losses. The dependence of switching losses from gate resistor is nearly linear, suggesting that changing the gate resistor, a way similar to Si-IGBT technology, can easily control di/dt and dv/dt. Turn-on losses at 200°C are lower compared to those at 25°C, which indicates the influence of the high internal p-type gate layer resistance. Inductive switching numerical analysis suggested the strong influence of channel doping conditions on the turn-on switching performance. The fast switching normally-off JFET devices require heavily doped narrow JFET channel design.

Prospects and Development of Vertical Normally-off JFETs in SiC

“…Based on numerical simulations, the increase of the channel doping in the range 1 • 10 16 cm −3 to 1 • 10 17 cm −3 reduces the turn-on time (and turn-on losses) during inductive switching of the DGTJFET by one order of magnitude [18]. The effect of the channel doping on the top gate capacitance and turn-off switching is opposite, however the influence of the increased gate capacitance due to the increased channel doping on the turn-off time and turn-off losses is much smaller [19]. The requirement of maximizing the channel doping for the increased turn-on speed of the N-o ff device coincides with the requirements for the improved high temperature operation as discussed earlier.…”

Static and switching characteristics of 3.3 kV double channel-doped SiC vertical junction field effect transistor in cascode configuration

“…Silicon-carbide (SiC) junction field-effect transistors (JFETs) have been developed for next-generation high-power devices [1][2][3][4][5][6][7][8][9][10][11][12][13] preceding SiC MOSFETs, because they have no oxide=semiconductor interface in the channel region, which causes both the gate oxide breakdown and threshold voltage instability of SiC MOSFETs. [14][15][16] Given this advantageous feature of JFETs, the authors previously developed 600 V normally-off and normally-on JFETs for increasing the current density by local channel doping in the p-n junction between the gate and channel regions.…”