Survey of reconfigurable architectures for multimedia applications

Abstract

In a short period of time, the multimedia sector has quickly progressed trying to overcome the exigencies of the customers in terms of transfer speeds, storage memory, image quality, and functionalities. In order to cope with this stringent situation, different hardware devices have been developed as possible choices. Despite of the fact that not every device is apt for implementing the high computational demands associated to multimedia applications; reconfigurable architectures appear as ideal candidates to achieve these necessities. As a direct consequence, worldwide universities and industries have incremented their research activity into this area, generating an important know-how base. In order to sort all the information generated about this issue, this paper reviews the most recent reconfigurable architectures for multimedia applications. As a result, this paper establishes the benefits and drawbacks of the different dynamically reconfigurable architectures for multimedia applications according to their system-level design.

Review on Architectures of Motion Estimation for Video Coding Standards

“…The reconfigurable architecture allows different configurations that can be customized to suit our application [3]. Reconfigurability achieves higher performance and achieves higher flexibility [7].…”

“…Reconfigurable architectures can be static or dynamic. Dynamically reconfigurable architectures are more suitable for implementing multimedia applications [3]. Thomas et al, [35] proposed a reconfigurable data flow engine for HEVC Motion Estimation and Lu et al, [24] proposed a reconfigurable on-chip motion estimation architecture which supports multiple video coding standards.…”

A novel array architecture and routing structure for massive-MIMO detection in Coarse-Grained Reconfigurable Architecture platform

“…ASICs are designed with fixed and limited functions, which make them infeasible to cater to new designs or standards. The CGRAs have proved as an alternative solution of both efficiency and flexibility when data processing for MIMO detection is applied in hardware architectures [1] .…”

Coarse-grained reconfigurable architecture with hierarchical context cache structure and management approach

“…Coarse-grained reconfigurable architecture (CGRA) has been proven to be a promising solution for computing intensive applications between the extremes of general purpose processor (GPP) and application specific integrated circuit (ASIC), which has higher performance level than GPP and wider applicability than ASIC [1]. CGRA supports dynamic reconfiguration at runtime [2], which not only boosts the performance but also can be reconfigured to adapt different characteristics of applications.…”