Surface Passivation of GaAs Substrates with SiO2 Deposited Using ALD

Dalapati, Goutam Kumar; Chia, C. K.; Mahata, Chandreswar; Das, Tanmoy; Maiti, C. K.; Kumar, M. K.; Gao, Han; Chiam, Sing Yang; Tan, Cheng; Chua, Chee Tee; Cheng, Yuanbing; Z., D.

doi:10.1149/1.3615963

Cited by 10 publications

(6 citation statements)

References 32 publications

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“…24,25 In their study they used only SiO 2 dielectric on the GaAs substrate without applying any high-k dielectrics. 24,25 In their study they used only SiO 2 dielectric on the GaAs substrate without applying any high-k dielectrics.…”

Section: Introductionmentioning

confidence: 99%

“…In recent studies Dalapati et al and Lee et al worked with ALD SiO 2 and liquid-phase-deposited (LPD) SiO 2 on GaAs respectively. 24,25 In their study they used only SiO 2 dielectric on the GaAs substrate without applying any high-k dielectrics. According to Dalapati et In this paper, we improved the III-V MOS capacitor properties by simultaneously adopting two methods.…”

Section: Introductionmentioning

confidence: 99%

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The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

Mahata

Yoon

et al. 2015

J. Mater. Chem. C

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Metal-oxide-semiconductor (MOS) capacitors with an amorphous Ta 1Àx Zr x O composite gate dielectric film and a SiO 2 passivation layer were fabricated on an indium phosphide (InP) substrate. To investigate the impact of the passivation layer, the interfacial chemical, physical and electrical properties of the Ta 1Àx Zr x O/InP and Ta 1Àx Zr x O/SiO 2 /InP MOS structures were studied in detail. Electrical conductivity measurements combined with chemical bonding analysis using X-ray photoelectron spectroscopy (XPS) and electron dispersive spectroscopy (EDS) were conducted in order to evaluate the suitability of a Ta 1Àx Zr x O alloy as a gate dielectric film for an InP substrate. XPS results showed that the Ta 1Àx Zr x O film retained its insulating characteristics and was thermally stable even after annealing at 500 1C. However, Fermi-level pinning and significant diffusion of indium through the Ta 1Àx Zr x O were observed. The diffusion of In was remarkably reduced after introducing the SiO 2 passivation layer, which resulted in an overall reduction in interfacial layer thickness. Parallel conductance contour measurements showed that the SiO 2 passivation layer resulted in unpinning of the Fermi-level. The introduction of a SiO 2 passivation layer with the Ta 1Àx Zr x O composite gate dielectric film was found to provide remarkably improved dielectric performance, which was mainly attributed to reduced In diffusion and the passivation of interfacial and bulk dielectric defects.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

Mahata

Yoon

et al. 2015

J. Mater. Chem. C

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“…[14][15][16][17][18][19] or surface passivation materials. [20][21][22][23] The increased demand for transparent active materials at the nanoscale justify the need for a deposition technique compatible with sensitive pre-deposited underlying layers, exible plastic devices or high aspect ratio substrates. [24][25][26][27][28] Therefore, atomic layer deposition (ALD) is considered as one of the most suitable techniques for its performance in terms of sub-nanometer thickness control and penetration coating into deep trenches or mesoporous structures.…”

Section: Introductionmentioning

confidence: 99%

SiO₂ thin film growth through a pure atomic layer deposition technique at room temperature

et al. 2020

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“…Even though several approaches had been made to realize high quality interface on bulk-GaAs substrates using high permittivity (high- k ) dielectrics and interfacial passivation layers (IPL), − there have been continuous efforts to improve the interface quality further. In addition, it is necessary to find the suitable dielectric which is also compatible with germanium substrates.…”

Section: Introductionmentioning

confidence: 99%

Surface Passivation and Interface Properties of Bulk GaAs and Epitaxial-GaAs/Ge Using Atomic Layer Deposited TiAlO Alloy Dielectric

Dalapati

Chia

Tan

et al. 2013

ACS Appl. Mater. Interfaces

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High quality surface passivation on bulk-GaAs substrates and epitaxial-GaAs/Ge (epi-GaAs) layers were achieved by using atomic layer deposited (ALD) titanium aluminum oxide (TiAlO) alloy dielectric. The TiAlO alloy dielectric suppresses the formation of defective native oxide on GaAs layers. X-ray photoelectron spectroscopy (XPS) analysis shows interfacial arsenic oxide (As(x)O(y)) and elemental arsenic (As) were completely removed from the GaAs surface. Energy dispersive X-ray diffraction (EDX) analysis and secondary ion mass spectroscopy (SIMS) analysis showed that TiAlO dielectric is an effective barrier layer for reducing the out-diffusion of elemental atoms, enhancing the electrical properties of bulk-GaAs based metal-oxide-semiconductor (MOS) devices. Moreover, ALD TiAlO alloy dielectric on epi-GaAs with AlGaAs buffer layer realized smooth interface between epi-GaAs layers and TiAlO dielectric, yielding a high quality surface passivation on epi-GaAs layers, much sought-after for high-speed transistor applications on a silicon platform. Presence of a thin AlGaAs buffer layer between epi-GaAs and Ge substrates improved interface quality and gate dielectric quality through the reduction of interfacial layer formation (Ga(x)O(y)) and suppression of elemental out-diffusion (Ga and As). The AlGaAs buffer layer and TiAlO dielectric play a key role to suppress the roughening, interfacial layer formation, and impurity diffusion into the dielectric, which in turn largely enhances the electrical property of the epi-GaAs MOS devices.

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Surface Passivation of GaAs Substrates with SiO2 Deposited Using ALD

Cited by 10 publications

References 32 publications

The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

SiO₂ thin film growth through a pure atomic layer deposition technique at room temperature

Surface Passivation and Interface Properties of Bulk GaAs and Epitaxial-GaAs/Ge Using Atomic Layer Deposited TiAlO Alloy Dielectric

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Surface Passivation of GaAs Substrates with SiO2 Deposited Using ALD

Cited by 10 publications

References 32 publications

The impact of atomic layer deposited SiO2passivation for high-k Ta1−xZrxO on the InP substrate

The impact of atomic layer deposited SiO2passivation for high-k Ta1−xZrxO on the InP substrate

SiO2 thin film growth through a pure atomic layer deposition technique at room temperature

Surface Passivation and Interface Properties of Bulk GaAs and Epitaxial-GaAs/Ge Using Atomic Layer Deposited TiAlO Alloy Dielectric

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Product

Resources

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The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

The impact of atomic layer deposited SiO₂passivation for high-k Ta_1−xZr_xO on the InP substrate

SiO₂ thin film growth through a pure atomic layer deposition technique at room temperature