2013
DOI: 10.1021/am302537b
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Surface Passivation and Interface Properties of Bulk GaAs and Epitaxial-GaAs/Ge Using Atomic Layer Deposited TiAlO Alloy Dielectric

Abstract: High quality surface passivation on bulk-GaAs substrates and epitaxial-GaAs/Ge (epi-GaAs) layers were achieved by using atomic layer deposited (ALD) titanium aluminum oxide (TiAlO) alloy dielectric. The TiAlO alloy dielectric suppresses the formation of defective native oxide on GaAs layers. X-ray photoelectron spectroscopy (XPS) analysis shows interfacial arsenic oxide (As(x)O(y)) and elemental arsenic (As) were completely removed from the GaAs surface. Energy dispersive X-ray diffraction (EDX) analysis and s… Show more

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Cited by 25 publications
(15 citation statements)
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“…Metal oxides (MOs) are widely used as gate dielectrics and surface passivation materials in a number of electronic and optoelectronic devices . The nature of the semiconductor–MO interface and the structural characteristics of the MOs predominantly influence the fundamental properties of these devices . Thus, a greater understanding of the interface and structural properties of MOs is crucial to realize advanced devices.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Metal oxides (MOs) are widely used as gate dielectrics and surface passivation materials in a number of electronic and optoelectronic devices . The nature of the semiconductor–MO interface and the structural characteristics of the MOs predominantly influence the fundamental properties of these devices . Thus, a greater understanding of the interface and structural properties of MOs is crucial to realize advanced devices.…”
Section: Introductionmentioning
confidence: 99%
“…Thus, a greater understanding of the interface and structural properties of MOs is crucial to realize advanced devices. Silicon oxide (SiO x ), aluminum oxide (AlO x ), and hafnium oxide (HfO x ) are commonly used MOs in semiconductor materials, including, but not limited to, crystalline silicon (c‐Si) and gallium arsenide (GaAs) . Muller et al have extensively examined the nature of the c‐Si/SiO 2 interface to control a nanometer‐thick gate oxide for advanced electronics.…”
Section: Introductionmentioning
confidence: 99%
“…15 Decomposed elements from the native oxides could diffuse through the high-k dielectric which would lead to electrical instabilities. 16,17 Most recently, using ex-situ hard X-ray photoelectron spectroscopy (XPS), Weiland et al 18 observed Ga and As out-diffusion on Al 2 O 3 /In 0.53 Ga 0.47 As stacks after N 2 annealing at temperatures between 400 C and 700 C. In another study, Kang et al 19 noted Ga-O formation on the top surface on Al 2 O 3 /HfO 2 /GaAs gate stacks after PDA at 700 C. All these studies suggest that III-V substrate elements might diffuse completely through the high-k dielectric film after post deposition anneals, although there have been no unambiguous proof and quantification of such diffusion. It is therefore important to devise experiments with tools that can provide clear evidence for elemental diffusion and changes in the chemical composition of high-k/III-V gate stacks for future production of high mobility devices.…”
mentioning
confidence: 99%
“…Furthermore, they also reported that the thin film of titanium (~5–20 nm) significantly reduced the Cu out-diffusion even at high temperature 56 . In our recent study on alloy oxides, presence of thin film TiO 2 in Al 2 O 3 significantly reduced the elemental out diffusion in gallium-arsenide based devices 57 . For the sputter grown TiO 2 /Cu/TiO 2 structure, from SIMS analysis, it was found that there is a hump of Ti at TiO 2 /Cu interface, reveals formation of the Ti-rich oxide at the Cu/TiO 2 interface.…”
Section: Resultsmentioning
confidence: 88%