Subthreshold Characteristic Analysis and Models for Tri-Gate SOI MOSFETs Using Substrate Bias Induced Effects

Gola, Deepti; Singh, Balraj; Tiwari, Pramod Kumar

doi:10.1109/tnano.2019.2906567

Cited by 19 publications

(5 citation statements)

References 26 publications

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“…Both models that depend on the field and those that depend on the concentration have been added to the equation to describe the mobility. The Auger recombination model was considered, because high current densities must be evaluated [22,23]. The dynamic non-tunnelling model was used to calculate the negative gradient of the valence band from the source to the drain and in the channel, as well as the conduction-band gradients.…”

Section: Device Simulation Parameter and Methodologymentioning

confidence: 99%

Enabling low-power analog and RFIC design through advanced semiconductor FDSOI MOSFETs

Singh,

Mishra,

Akhter

2024

Eng. Res. Express

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This study investigates the electrical performance of advanced semiconductor Ge-pocket-doped fully depleted silicon-on-insulator MOSFETs in comparison to conventional fully depleted silicon-on-insulator (FDSOI) MOSFETs. In this study vital electrical parameters such as the drain current, band diagram, lateral electric field, surface potential, and work function of the gate material were investigated. The advanced Ge pocket-doped FDSOI MOSFET structure demonstrates superior characteristics, such as a higher Ion/Ioff ratio, smaller subthreshold slope, lower capacitance, and higher cut-off frequency, when compared to conventional FDSOI MOSFETs. The structure of the Ge pocket-doped FDSOI MOSFET in the source and drain regions is designed to overcome the scaling effects of the transistor. In addition, this paper delves into the fabrication of the proposed device structure, outlining the key steps and intricacies involved. This study shows that the proposed device can be used for both digital and analog applications because it has good switching performance and a low cut-off frequency. In addition, the fabrication steps of the proposed structure were compatible with the existing fabrication process steps for conventional FDSOI MOSFETs. The simulation and analysis of the advanced semiconductor structure were performed using the Sentaurus TCAD simulator.

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Section: Device Simulation Parameter and Methodologymentioning

confidence: 99%

Enabling low-power analog and RFIC design through advanced semiconductor FDSOI MOSFETs

Singh,

Mishra,

Akhter

2024

Eng. Res. Express

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show abstract

“…DIBL (Equation ) is defined as the variation in the threshold voltage V th with a change in the drain voltage V D

DIBL = Δ V_{th} / | Δ V_{normalD} |

…”

Section: Device Operation and Structurementioning

confidence: 99%

A 10 nm Asymmetric Graphene–Rhenium Disulfide Field‐Effect Transistor for High‐Speed Application

Chawla

Singhal

Garg

2019

Physica Status Solidi (a)

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Field-effect transistor devices with exfoliated 2D materials are potent in various optical and electronics applications including photodetectors, valleytronics, spintronic, circuits, memory, and optical modulators. However, these devices endure limited gate control, low carrier mobility, and high operating voltage. This study introduces a new asymmetric graphene-rhenium disulfide heterojunction Schottky barrier metal-oxide-semiconductor field-effect transistor engineered with high graphene carrier mobility and high rhenium disulfide I on-off ratio in a 10 nm channel-length device. The proposed device has better gate control ability, I on-off ratio of 10 6 , high carrier mobility (87.44 cm 2 V À1 s À1 ), and low subthreshold swing of 43.12 mV dec À1 in the subthreshold region at 0.05 V applied drain voltage. The significant reduction in subthreshold swing at low voltage opens a suite of high-switching-speed low-powered nanologic applications for the upcoming Internet-of-Things era. The material properties of graphene-rhenium disulfide heterojunctions are derived using an ab initio quantum transport simulation tool.

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“…As we are moving towards the nanoscale regime, with the scaling of CMOS dimension, device performance degrades because of various short channel effects (SCE) [1]. In order to enhance the device performance several multi-gate [2] structures like Double Gate [3], Tri-Gate [4], Gate-all-around (GAA) [5], FinFET [6], Floating Gate (FG) [7] are being explored because of their superior electrostatics which can overcome the short channel effects. Among these, floating gate FET (FGFET) has various advantages over other FET devices which result in its higher data storage density and robustness towards large number of program/ erase cycles.…”

Section: Introductionmentioning

confidence: 99%

Capacitance modeling, simulation and RF characterization of horizontal floating gate field effect transistor (H-FGFET) for gas sensing application

Babbar,

Garg,

Kabra

2024

Eng. Res. Express

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In this paper, physics-based capacitance model has been developed for horizontal floating gate field effect transistor (H-FGFET). The horizontal design of floating gate (FG) FET allows detection of large gas molecules like nitrogen dioxide (NO2), sulphur dioxide (SO2), hydrogen sulfide (H2S), carbon dioxide (CO2) etc. In order to validate the proposed model, the device has been designed using Sentaurus TCAD simulator and results have been validated with experimental data. Different electrical parameters such as transfer characteristics, switching ratio, output characteristics, threshold voltage, drain induced barrier lowering (DIBL), C-V characteristics, transconductance, output conductance and RF characteristics of the device have been analyzed at room temperature. The simulation result shows that increase in channel length of H-FGFET results in decreased leakage current, improved switching performance, increased gate capacitance and reduced DIBL. The comparative analysis of H-FGFET with previously reported floating gate FET structures reveal that proposed device offers highest switching ratio. The RF characteristics of H-FGFET illustrates that proposed device can operate efficiently as an amplifier for the frequency range of 0.1 GHz to 100 GHz. Further, the proposed device has also been tested for the detection of nitrogen dioxide gas and results reveal that with increase in operating temperature from 30 °C to 180 °C the leakage current of the device increases from 10−13 to 10−9 and OFF current sensitivity of the proposed sensor changes by 82% on changing the work function of sensing layer from 50 meV to 250 meV.

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Subthreshold Characteristic Analysis and Models for Tri-Gate SOI MOSFETs Using Substrate Bias Induced Effects

Cited by 19 publications

References 26 publications

Enabling low-power analog and RFIC design through advanced semiconductor FDSOI MOSFETs

Enabling low-power analog and RFIC design through advanced semiconductor FDSOI MOSFETs

A 10 nm Asymmetric Graphene–Rhenium Disulfide Field‐Effect Transistor for High‐Speed Application

Capacitance modeling, simulation and RF characterization of horizontal floating gate field effect transistor (H-FGFET) for gas sensing application

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