Abstract:The properties of fullydepleted CMOS/SIMOX devices as low-power high-performance VLSI components are presented. When compared with bulk devices the steeper subthreshold slope of the SIMOX device allows one to enhance the performance of multipliers and SRAMs at low supply voltages without increasing the leakage current. The controllability of the threshold voltage statistical spreading and the standby leakage current of SIMOX LSI is also demonstrated.
“…6, the parameters of FD SOI MOSFETs fabricated to date are also plotted [4,11]. It is seen that these devices almost fully agree with the proposed scaling scenario.…”
Section: Scenario Of Scaling To Deep Sub-01-mm Sizementioning
“…6, the parameters of FD SOI MOSFETs fabricated to date are also plotted [4,11]. It is seen that these devices almost fully agree with the proposed scaling scenario.…”
Section: Scenario Of Scaling To Deep Sub-01-mm Sizementioning
“…To reduce power, a combination of a fully depleted (FD-type) SOI device with its superior low-power operation and the technology used in low-voltage circuits is extremely effective [2]. This device is formed using an MOS transistor on a Si thin wafer with a thickness of about 50 nm on a Si-oxide film.…”
SUMMARYWe have introduced an example of a system that embodies the concept of a ubiquitous communication service and explained the importance of low power consumption in the communicator that will serve as the bridge between the real world and the network for real-time services in which sensor data is acquired every second. An effective solution to the problem of high energy efficiency is to employ the synergy of combining low-voltage analog circuit technology and FD-SOI devices. Taking advantage of that synergy to reduce the power consumption of the communicator during operation to about 10 mW and employing intermittent operation with an activity rate of less than l% would make it possible to support operation for 1 year or more with a commercial coin-type lithium battery.
“…Depending on whether this difference is used to increase the drain current or to achieve a further reduction of V DD , it can be properly used either for high speed or for low power. Figure 5 compares the performance of a 48-bit multiplier implemented on a 40-KG gate array for bulk Si and SOI MOSFET with the same off-current [23]. At the same supply voltage, SOI achieves higher speeds and the speed difference becomes more distinct at lower voltages.…”
Section: Achieving Low Power Consumption and High Speedmentioning
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