We present measurements of resonant tunneling through discrete energy levels of a silicon double quantum dot formed in a thin silicon-on-insulator layer. In the absence of piezoelectric phonon coupling, spontaneous phonon emission with deformation-potential coupling accounts for inelastic tunneling through the ground states of the two dots. Such transport measurements enable us to observe a Pauli spin blockade due to effective two-electron spin-triplet correlations, evident in a distinct bias-polarity dependence of resonant tunneling through the ground states. The blockade is lifted by the excited-state resonance by virtue of efficient phonon emission between the ground states. Our experiment demonstrates considerable potential for investigating silicon-based spin dynamics and spin-based quantum information processing.

We have achieved the operation of single-electron tunneling ͑SET͒ transistors with gate-induced electrostatic barriers using silicon nanowire metal-oxide-semiconductor field-effect transistor ͑MOSFET͒ structures. The conductance of tunnel barriers is tunable by more than three orders of magnitude. By using the flexible control of the tunable barriers, the systematic evolution from a single charge island to double islands was clearly observed. We obtained excellent reproducibility in the gate capacitances: values on the order of 10 aF, with the variation smaller than 1 aF. This flexibility and controllability both demonstrate that the device is highly designable to build a variety of SET devices based on complementary metal-oxide-semiconductor technology.

On-chip all-optical switching based on the carrier plasma dispersion in an argon ion (Ar+) implanted photonic crystal (PhC) nanocavity that is connected to input/output waveguides is described. A high dose of Ar+ is introduced, and annealing is used to recrystallize the silicon and thus create dislocation loops at the center of the PhC slab. Dislocation loops enable the fast recombination of the carriers, which allows a fast switching recovery time for PhC switches. The switching window (∼70ps) is three times smaller than that without ion implantation, while the required operating energy remains almost the same (<100fJ).

Single-electron devices (SEDs) are attracting a lot of attention because of their capability of manipulating just one electron. For their operation, they utilize the Coulomb blockade (CB), which occurs in tiny structures made from conductive material due to the electrostatic interactions of confined electrons. Metals or III–V compound semiconductors have so far been used to investigate the CB and related phenomena from the physical point of view. However, silicon is preferable from the viewpoint of applications to integrated circuits because, on a silicon substrate, SEDs can be used in combination with conventional complementary metal-oxide-semiconductor (CMOS) circuits. In addition, the well established fabrication technologies for CMOS large-scale integrated circuits (LSIs) can be applied to making such small structures. LSI applications of the silicon SEDs can be categorized into two fields: memory and logic. Many kinds of device structure and fabrication process have been proposed and tested for these purposes. This paper introduces the current status of silicon-based SED studies for LSI applications.

A common observation in metal-based ͑specifically, those with AlO x tunnel junctions͒ single-electron tunneling ͑SET͒ devices is a time-dependent instability known as the long-term charge offset drift. This drift is not seen in Si-based devices. Our aim is to understand the difference between these, and ultimately to overcome the drift in the metal-based devices. A comprehensive set of measurements shows that ͑1͒ brief measurements over short periods of time can mask the underlying drift, ͑2͒ we have not found any reproducible technique to eliminate the drift, and ͑3͒ two-level fluctuators ͑TLFs͒ in the metal-based devices are not stable. In contrast, in the Si-based devices the charge offset drifts by less than 0.01e over many days, and the TLFs are stable. We also show charge noise measurements in a SET device over four decades of temperature. We present a model for the charge offset drift based on the observation of nonequilibrium heat evolution in glassy materials, and obtain a numerical estimate in good agreement with our charge offset drift observations. We conclude that, while the Si devices are not perfect and defect-free, the defects are stable and noninteracting; in contrast, the interacting, unstable glasslike defects in the metal-based devices are what lead to the charge offset drift. We end by suggesting some particular directions for the improvement in fabrication, and in particular, fabrication with crystalline metal-oxide barriers, that may lead to charge offset drift-free behavior.

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We report the effect of low-energy (1 keV) electron beam irradiation on gated, three-terminal devices constructed from metallic single-walled carbon nanotubes. Pristine devices, which exhibited negligible gate voltage response at room temperature and metallic single-electron transistor characteristics at low temperatures, when exposed to an electron beam, exhibited ambipolar field effect transistor (room temperature) and single-electron transistor (low temperature) characteristics. This metal-semiconductor transition is attributed to inhomogeneous electric fields arising from charging during electron irradiation.

The ultimate goal of future information processing might be the realization of a circuit in which one bit is represented by a single electron. Such a challenging circuit would comprise elemental devices whose tasks are to drag, transfer, and detect single electrons. In achieving these tasks, the Coulomb blockade, which occurs in tiny conducting materials, plays an important role. This paper describes the current status of research on such single-charge-control devices from the viewpoints of circuit applications.