Sub-$\hbox{100-}\mu\hbox{A}$ Reset Current of Nickel Oxide Resistive Memory Through Control of Filamentary Conductance by Current Limit of MOSFET

Sato, Yoshiaki; Tsunoda, Koji; Kinoshita, Kentaro; Noshiro, Hideyuki; Aoki, Masaki; Sugiyama, Yoshihiro

doi:10.1109/ted.2008.919385

Cited by 89 publications

(38 citation statements)

References 16 publications

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“…Data approximately [7]. The inverse proportionality between R and I D is consistent with the behavior for integrated 1T1R devices [5]- [7] and can be explained by the current during set controlling the CF area A ∝ I D , thus leading to R ∝ A −1 CF ∝ I −1 D [7]. A deviation from this behavior is seen at a relatively low I D value, where R becomes larger than V 0 I −1 D ; this can be due to the transition from a metallic to a semiconductive nature of conduction for small CF sizes [11].…”

Section: Methodssupporting

confidence: 79%

“…The large reset current I reset needed to erase the conductive filament (CF) may pose scaling limitations since large I reset would require an excessive area for the access diode used to select/unselect the cell in the array [2], [4]. Single-transistor/single-resistor (1T1R) structures where thus introduced to control the size of the CF and reduce I reset [5]- [7]. However, I reset reduction was addressed for quasi- [8].…”

Section: Introductionmentioning

confidence: 99%

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Reset Instability in Pulsed-Operated Unipolar Resistive-Switching Random Access Memory Devices

Nardi

Cagli

Spiga³

et al. 2011

IEEE Electron Device Lett.

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Resistive-switching random access memory (RRAM) devices are attracting increasing interest as a potential candidate for high-density nonvolatile memory devices. One of the main issues toward RRAM feasibility is the reduction of the reset current I reset necessary to restore the high-resistance state in the device. I reset can be reduced by controlling the size of the conductive filament responsible for the low-resistance state; however, available data only focus on direct-current reset analysis. This letter addresses I reset reduction under pulsed operation. Unstable reset behaviors, including set-reset and set instability, are shown to occur during relatively fast pulses and starting from set states with relatively large resistance values. These instability effects limit I reset reduction, posing a potential issue of minimum reset current achievable in RRAM devices.Index Terms-Crossbar architecture, nonvolatile memory, resistive-switching random access memory (RRAM).

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Section: Methodssupporting

confidence: 79%

Section: Introductionmentioning

confidence: 99%

Reset Instability in Pulsed-Operated Unipolar Resistive-Switching Random Access Memory Devices

Nardi

Cagli

Spiga³

et al. 2011

IEEE Electron Device Lett.

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“…It indicates that the device conductivity has also an increasing or decreasing changes correspondingly, with the set or reset process. This phenomenon is very similar to the potentiation or depression of the signal in the biological nerve synapse [24]. …”

Section: Resultsmentioning

confidence: 88%

Synaptic Plasticity and Learning Behaviors Mimicked in Single Inorganic Synapses of Pt/HfOx/ZnOx/TiN Memristive System

et al. 2017

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In this work, a kind of new memristor with the simple structure of Pt/HfOx/ZnOx/TiN was fabricated completely via combination of thermal-atomic layer deposition (TALD) and plasma-enhanced ALD (PEALD). The synaptic plasticity and learning behaviors of Pt/HfOx/ZnOx/TiN memristive system have been investigated deeply. Multilevel resistance states are obtained by varying the programming voltage amplitudes during the pulse cycling. The device conductance can be continuously increased or decreased from cycle to cycle with better endurance characteristics up to about 3 × 103 cycles. Several essential synaptic functions are simultaneously achieved in such a single double-layer of HfOx/ZnOx device, including nonlinear transmission properties, such as long-term plasticity (LTP), short-term plasticity (STP), and spike-timing-dependent plasticity. The transformation from STP to LTP induced by repetitive pulse stimulation is confirmed in Pt/HfOx/ZnOx/TiN memristive device. Above all, simple structure of Pt/HfOx/ZnOx/TiN by ALD technique is a kind of promising memristor device for applications in artificial neural network.

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“…Although a large number of studies have been carried out in the inorganic field of 1T1R memory circuitry [65][66][67]70], because of the poor processability of organic materials, it is generally difficult to fabricate both organic transistors and organic resistors in one chip without damaging the active layers and with no degradation of the device. Thus, the feasibility of fabricating an all organic 1T1R memory circuit deserves in-depth exploration.…”

Section: Integration Of Two-terminal Organic Memory Devicesmentioning

confidence: 99%

Advancements in organic nonvolatile memory devices

Liu

et al. 2011

Chin. Sci. Bull.

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Sub-$\hbox{100-}\mu\hbox{A}$ Reset Current of Nickel Oxide Resistive Memory Through Control of Filamentary Conductance by Current Limit of MOSFET

Cited by 89 publications

References 16 publications

Reset Instability in Pulsed-Operated Unipolar Resistive-Switching Random Access Memory Devices

Reset Instability in Pulsed-Operated Unipolar Resistive-Switching Random Access Memory Devices

Synaptic Plasticity and Learning Behaviors Mimicked in Single Inorganic Synapses of Pt/HfOx/ZnOx/TiN Memristive System

Advancements in organic nonvolatile memory devices

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