Study of Si/GeSi p-n heterostructures

Abstract

The experimental results of a molecular-beam epitaxy grown Si/GeSi p-n heterojunction are reported. It is found that the current flow in these p-n heterojunctions shows a nonideality factor of about 1.5 at room temperature and 2.35 at liquid nitrogen temperature. The nonideal behavior of the Si/GeSi p-n heterojunction is attributed to the charges that are trapped at the heterointerface. Annealing the samples at temperatures higher than the growth temperature results in an increase in the density of defects as well as an increase in the nonideal current. C-V measurements were employed to further investigate the behavior of the charges that are trapped in the interface. From C-V measurements under reverse bias it is found that increasing the annealing time and temperature increases the density of interface traps. In addition, a charge density of about 1012 cm−2 is found to be present at the Si/GeSi interface for the as-grown sample and increases with increasing annealing time and temperature.

Improvement of amorphous silicon n-i-p solar cells by incorporating double-layer hydrogenated nanocrystalline silicon structure

“…For an ideal p-n junction, the slope of C −2 versus V is a constant. Nevertheless, the defect states at the interface region also contribute to the capacitance at high voltage, and then lead to a change of the slope of C − 2 versus V [22,23]. As shown in Fig.…”

High Doping Density/High Electric Field, Stress and Heterojunction Effects on the Characteristics of CMOS Compatible p-n Junctions

“…[107][108][109] For relaxed SiGe=Si HJs one can add the non-ideal current due to recombination in the depletion region and at the hetero-interface. [110][111][112][113][114][115][116] The C-V relationship of an abrupt n-Si=p-Ge HJ without interface states is given by 104,105,109…”

Diode Analysis of Electrically Active Defects in Recessed SiGe Source/Drain Diodes

“…A major point of further study is the origin (and nature) of the observed extended defects. Of course, one should also consider possible contributions from interface states at the SiGe/Si interface (9,10). It should, finally, be remarked that the pronounced increase in J A for reduced etch depth is not related to a change in the depletion depth or the carrier doping density, as can be derived from the free carrier profiles in Fig.…”