Study of indium and solder bumps for the BTeV pixel detector

Abstract

Abstract--The pixel detector proposed for the BTeV experiment at the Fermilab Tevatron will use bump-bonding technology based on either Indium or Pb/Sn solder to connect the front-end readout chips to the silicon pixel sensors. We have studied the strength of the bumps by visual inspection of the bumps bonding silicon sensor modules to dummy chips made out of glass. The studies were done before and after thermal cycles, exposed to intense irradiation, and with the assemblies glued to a graphite substrate. We have also carried out studies on effects of temperature changes on both types of bump bonds by observing the responses of single-chip pixel detectors to an Sr 90 source. We report the results from these studies and our plan to measure the effect of cryogenic temperatures on the bumps. No loss in strength and connectivity after irradiationWe have previously reported large-scale tests of the yield using both indium and Pb/Sn solder bumps [1]. The conclusion is that both seem to be viable for pixel detectors. We have also carried out studies of various effects (e.g. storage over long period, effect of heating and cooling, and radiation) on both types of bump bonds using daisy-chained parts on a small scale [2]. Overall, these tests showed little changes in the integrity of the bump connections. Nevertheless, questions still remain on the long-term reliability of the bumps due to thermal cycle effects, attachment to a substrate with a different coefficient of thermal expansion (CTE), and radiation.

Pixel multichip module design for a high energy physics experiment

“…The solder bumps on the other hand, were not affected by temperature changes or by radiation. For more details refer to [7].…”

Numerical analysis of thermo-mechanical behavior of indium micro-joint at cryogenic temperatures

“…In particular, indium bump bonding used in flip-chip assembly can offer high input/output numbers (I/Os), a fine pitch and small bump dimension (< 20 μ m) [1][2][3]. The mismatch of CTEs between the substrate and connected chip, which is one of the most critical reliability issues in flip-chip assembly, can be accommodated due to indium's excellent ductility [4,5].…”