-The Electronic Systems Engineering Department of the Computing Division at the Fermi National AcceleratorLaboratory has developed a data acquisition system flexible and powerful enough to meet the needs of a variety of high energy physics applications. The system described in this paper is called CAPTAN (Compact And Programmable daTa Acquisition Node) and its architecture and capabilities are presented in detail here.The three most important characteristics of this system are flexibility, versatility and scalability. These three main features are supported by key architectural features; a vertical bus that permits the user to stack multiple boards, a gigabit Ethernet link that permits high speed communications to the system and the core group of boards that provide specific capabilities for the system.In this paper, we describe the system architecture, give an overview of its capabilities and point out possible applications.
The Gigabit Link Interface Board (GLIB) project is an FPGA-based platform for users of high-speed optical links in high energy physics experiments. The major hardware component of the platform is the GLIB Advanced Mezzanine Card (AMC). Additionally to the AMC, auxiliary components are developed that enhance GLIB platform's I/O bandwidth and compatibility with legacy and future triggering and/or data acquisition interfaces. This article focuses on the development of the auxiliary components that together with the GLIB AMC offer a complete solution for beam/irradiation tests of detector modules and evaluation of optical links.
Abstract-At Fermilab, a pixel detector multichip module is being developed for the BTeV experiment. The module is composed of three layers. The lowest layer is formed by the readout integrated circuits (ICs). The back of the ICs is in thermal contact with the supporting structure, while the top is flip-chip bump-bonded to the pixel sensor. A low mass flex-circuit interconnect is glued on the top of this assembly, and the readout IC pads are wire-bounded to the circuit. This paper presents recent results on the development of a multichip module prototype and summarizes its performance characteristics.
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I1 COMPONENTSThe Data Acquisition System (DAQ) at the Collider Detector at Fermilab is currently being upgraded to handle a minimum of 100 eventdsec for an aggregate bandwidth which is at least 25 Mbyteslsec. The DAQ System is based on a commercial switching network which has interfaces to VME bus. The modules that read out the front end crates (FASTBUS and RABBIT) have to deliver the data to the VME bus based host adapters of the switch. This paper describes a read out system that has the required bandwidth while keeping the experiment deadtime due to the read out to a minimum.
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