2014
DOI: 10.1016/j.mejo.2013.12.001
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Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm

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Cited by 5 publications
(4 citation statements)
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“…The 3T1C cell structure has an interesting characteristic in that reading data from the storage cell does not require the content of the cell to be discharged onto a shared bit line. That is data reads to DRAM cells are not destructive in 3T1C cells [12].…”
Section: B Three-transistor Dram Cellmentioning
confidence: 99%
“…The 3T1C cell structure has an interesting characteristic in that reading data from the storage cell does not require the content of the cell to be discharged onto a shared bit line. That is data reads to DRAM cells are not destructive in 3T1C cells [12].…”
Section: B Three-transistor Dram Cellmentioning
confidence: 99%
“…The circuit enumerates a circuit which exists as two cross-coupled inverters along with an access transistor which is controlled by the read word line (RWL) for read operation and two more access transistors which are controlled by the write word line (WWL) for write operation [3]. Figure 2 depicts the circuit diagram of an SRAM 11T cell.…”
Section: Sram 11t Cellmentioning
confidence: 99%
“…ROM, RAM, EPROM, EEPROM, Flash memory, static random access memory (SRAM) [1,2], dynamic random access memory (DRAM) [3,4], synchronous dynamic random access memory (SDRAM), and the very new magnetoresistive random access memory (MRAM) that could now be seen in the electronics literature. Each one has its own merits and areas in which it may be used.…”
Section: Introductionmentioning
confidence: 99%
“…If allow (0) level is stored, transistor T2 keeps turned off. [9] Variability introduces a wide range of effects, especially on the performance of integrated circuits. Some of them appear during the manufacturing process, others during the working life, and all of them have as a consequence a decrease in the circuit reliability.…”
Section: T1d Dram Cellmentioning
confidence: 99%