Statistical metrology for characterizing CMP processes

Prasad, Sharad; Loh, W.; Kapoor, A.; Chang, E.; Stine, B.E.; Boning, Duane S.; Chung, J.E.

doi:10.1016/s0167-9317(96)00052-4

Cited by 13 publications

(9 citation statements)

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“…[16][17][18] Despite recent advances in CMP, some manufacturing concerns associated with successful implementation of CMP remain to be overcome. [16][17][18][19][20][21][22][23] In theory, CMP can achieve global planarity, but the problem of within wafer nonuniformity (WIWNU) still remains as one of the major operation concerns. WI-WNU indicates the variation in the surface thickness across the wafer radial position, especially on the edge.…”

Section: Multizone Cmpmentioning

confidence: 99%

Batch Sequencing for Run-to-Run Control: Application to Chemical Mechanical Polishing

Chen¹,

Su²,

Shiu³

et al. 2005

Ind. Eng. Chem. Res.

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This work compliments and extends the capability of the run-to-run (R2R) control by sequencing the incomings such that improved control performance can be achieved. Unlike chemical or mechanical systems, this is important for semiconductor manufacturing processes because some prior information about the incoming wafers is generally available. First, the limitation of a R2R control type of feedback system is explained. The frequency domain explanation is as follows: a negative feedback system is effective rejecting a low-frequency type of disturbance. From the feedback property, then the answer to the feed sequencing problem becomes clear: arrange the feed (which we are capable of doing) in such a way that it gives a low-frequency characteristic. Furthermore, a scalar load strength indicator is derived, and an engineering approach is taken to sort the incomings effectively. Two policies, from thin to thick (in terms of prethickness, policy L2R) and from thick to thin (policy R2L), are proposed, and they are shown to provide a better control performance over the conventional random feed policy (R). The feed sequencing problems are tested for systems with different dimensions, e.g., single input single output, single input multiple output, and multiple input multiple output systems, which include the model of an experimental chemical mechanical polishing process, and the results show that an improved control performance can be obtained simply by arranging the feeds.

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Section: Multizone Cmpmentioning

confidence: 99%

Batch Sequencing for Run-to-Run Control: Application to Chemical Mechanical Polishing

Chen¹,

Su²,

Shiu³

et al. 2005

Ind. Eng. Chem. Res.

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“…CMP polishing process is required for planarization of wafer surface, as lack of planarity may lead to insufficient depth of focus [8]. The topography variation of wafer surface after CMP is closely related to the feature density distribution [9,10]. Given the feature density distribution, a 2-D low-pass filter model proposed by Ouma et al is widely used to estimate the post-CMP topography variation [11].…”

Section: Density Optimizationmentioning

confidence: 99%

A multi-objective floorplanner for shuttle mask optimization

Xu¹,

Tian²,

Pan³

et al. 2004

SPIE Proceedings

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Shrinkage of VLSI feature size and use of advanced Reticle Enhancement Technologies (RET) in manufacturing such as OPC and PSM have dramatically pushed up cost of mask. For example of a 130nm or 90nm mask set, the mask cost can easily reach one or two million US dollars. Shuttle mask is an effective method to share the mask cost by putting different chips on the same mask. Shuttle mask floorplanning is a key step to pack these chips according to certain objectives and constraints related to cost, yield, and manufacturability. In this paper, we present a simulated annealing based floorplanner to solve the shuttle mask floorplanning problem with multiple optimization objectives and constraints. We will consider area minimization, density optimization (for manufacturability enhancement with CMP), wafer utilization maximization, die-to-die inspection constraint, die orientation constraint and their combinations. A nice property of our floorplanner is that it can be easily adapted to different cost models of mask and wafer manufacturing. Experiments on industry data show promising results.

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“…Initial investigations of oxide thickness included development of a fingered electrical capacitive test structure, as illustrated in Fig. 4, from which the oxide thickness between two metal layers could be inferred using TCAD tools in conjunction with a large volume of electrical probe measurements (5)(6)(7)(8)11).…”

Section: A Test Structure Designmentioning

confidence: 99%

“…While we discussed the connection to circuit performance evaluation in this paper, we believe that statistical metrology methods are also extremely powerful in developing and optimizing advanced process technology (e.g. the development of optimal CMP processes (10,11,12,23,29) or pads that minimize pattern dependencies), as well as in equipment selection and evaluation, and in process control. For example, CMP models are enabling more time and resource efficient processes which minimize the production of waste by-products in CMP.…”

Section: Summary and Future Workmentioning

confidence: 99%