Statistical Deviations from the Theoretical only-SBU Model to Estimate MCU rates in SRAMs

Abstract

International audienceThis paper addresses a well-known problem that occurs when memories are exposed to radiation: the determination if a bit flip is isolated or if it belongs to a multiple event. As it is unusual to know the physical layout of the memory, this paper proposes to evaluate the statistical properties of the sets of corrupted addresses and to compare the results with a mathematical prediction model where all of the events are single bit upsets. A set of rules easy to implement in common programming languages can be iteratively applied if anomalies are observed, thus yielding a classification of errors quite closer to reality (more than 80% accuracy in our experiments)

Single Event Upsets Under 14-MeV Neutrons in a 28-nm SRAM-Based FPGA in Static Mode

“…Thus, the discrepancies can be used to group the addresses of the flipped cells in multiple events allowing a quite accurate depiction of the typology of events even without any information about the physical layout of the device. This idea was extended by the authors in other works to systematize the procedure [9], [10]. In this case, the following scheme was implemented:…”

“…This paper discusses the sensitivity of a 28-nm SRAM-based FPGA under 14.2-MeV neutron radiation and classifies errors in SBUs and MCUs by using a variation of the statistical method presented in [9] and [10]. Issued cross sections are used to make predictions for typical environments and to propose an improvement of fault injection tests.…”

Inherent Uncertainty in the Determination of Multiple Event Cross Sections in Radiation Tests

“…Eq. 4 and a slightly different version of (7) can be used in (16) to get the original equations proposed by Tausch. Eqs.…”

“…The second option consists in combining logical addresses in pairs (e.g., XORing [4] or subtracting [5]) to detect the resulting values that occur more often than expected and, thus, pointing out to the existence of potential MCUs. Anomalously repeated values are used to combine addresses in pairs and, this way, discover hidden related bitflips [6], [7]. The main advantage of this technique is that it is not necessary to have access to any proprietary information about the memory layout.…”

“…Finally, there also exist the so-called "statistical methods", in which anomalies in the characteristics of the pairs of hit addresses need to be discovered. Two examples [6], [7] (7), (9), and (10), respectively.…”