Stacking SRAM banks for ultra low power standby mode operation

Cabe, Adam C.; Qi, Zhenyu; Stan, Mircea R.

doi:10.1145/1837274.1837451

Cited by 16 publications

(2 citation statements)

References 14 publications

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“…Many previous studies related to SVD have been done in terms of power converter [6], [8], [20]- [26]. However, if these technologies are not considered thoroughly along with the peripheral circuits required from the system perspective, they Δ due to (9) Δ are incomplete due to limited applications.…”

Section: System Viewmentioning

confidence: 99%

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Analysis and Design of 4-to-1 Capacitor-Stacking Balancer for Stacked Voltage Domain

Noh¹,

Mace²,

Park³

2020

IEEE Access

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This paper presents an alternative method for achieving more efficient and reliable DC-DC conversion and balancing operations for low-power applications in a stacked voltage domain. This work comprehensively analyzes the operating principles and power conversion loss of a proposed capacitorstacking balancing circuit at the system level. The analysis and design of the capacitor-stacking balancing circuit in the stacked voltage domain, including the time-domain operation, voltage equation, and dead-time effect, are explored and implemented. This study provides an opportunity to achieve a highly optimized system with high efficiency. A comprehensive analysis of efficiency at the system level shows the advantages and limitations according to each stacking method under a given system condition. Considering the redundancy issues of the previous method at system-level analysis, the capacitor-stacking balancing method is a preferable choice for low-power, high-reliability, and high-efficiency applications under light load conditions. This study also provides an analytical efficiency model under current imbalance, which is a notable difference from previous research and case studies concerning power converters. Prototype board with lithium-ion battery power and a core voltage of 0.825 V-a low-power application-was built to verify the proposed model and analysis. The experimental efficiency reached 94.9% at 20% of the maximum workload.

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Section: System Viewmentioning

confidence: 99%

“…2 with the high-level power design approach. Many studies have been done on the SVD until recently from low power to high power applications [6], [8], [20]- [26]. In the N-level SVD system, when the N stacking is performed, the following characteristics related to power conversion are addressed as shown in [18], [22].…”

Section: Introductionmentioning

confidence: 99%