Specific Contact Resistivity of Tunnel Barrier Contacts Used for Fermi Level Depinning

Contact resistivities of metal-insulator-semiconductor contacts and metal-semiconductor contacts

“…2, the TiO 2 thickness (t) is determined with XTEM, and the effective electron tunneling mass (m à ti ) and the dielectric constant (e ri ) of TiO 2 are taken from the literature. 44 The Ti/Si conduction band offset DE C of $0.55 eV and / b of $0.1 eV are directly extracted from the fitting. The DE C of $0.55 eV is close to the values of 0.6-0.8 eV determined from the internal electron photoemission (IPE) spectroscopy 45 and is different from the zero DE C in the previous simulation reports.…”

“…The amorphous TiO 2 has a $1 eV larger band gap and a much higher DE C with respect to Si than the crystalline TiO 2 . 45,47 In the previous MIS simulation studies, Roy et al 44 and Agrawal et al 48 concluded that TiO 2 is an optimal candidate for the MIS contacts on n-Ge or n-Si. These conclusions are actually based on the zero DE C assumption of TiO 2 , while the realistic DE C of $0.6 eV clearly makes amorphous TiO 2 a less ideal candidate for MIS.…”

“…4, we see that the q c -N d curves of A, B, and C are almost in parallel, which means that the insulator in the MIS contacts augments q c by a similar degree for any N d . The advantage of the MIS contacts is most pronounced at relatively low doping levels, but it diminishes gradually with increasing N d -at ultrahigh doping levels, even the "ideal" MIS, A, cannot outperform its MS counterpart, D. Moreover, the existence of such an "ideal" MIS as A is suspicious: for instance, insulators with m à ti as low as 0.2 m 0 are uncommon; 46,50 insulators that have low DE C with semiconductors are rare; 44,46,50 moreover, there is usually a minimal insulator thickness of >1 nm required for an MIS to lower / b to 0.1 eV. 5,7,9,13 In conclusion, the MIS contacts are more appealing to the applications that use relatively low doped semiconductors, such as compound semiconductor devices and Si solar cells, while the MS contacts will still be the major force to push q c down below 1  10 À8 XÁcm 2 to meet the Complementary Metal-Oxide-Semiconductor (CMOS) requirement for the 10 nm technology node and beyond.…”

Fermi level de-pinning of aluminium contacts to n-type germanium using thin atomic layer deposited layers

“…It is often attributed to blocking of the electron wave function between metal and semiconductor and consequent reduction in the number of metal-induced gap states (MIGS). 16,17 More recently, several authors have argued that a dipole at the metal-semiconductor interface [18][19][20][21] or trapped charge in the interfacial layer will also alter the barrier height. 22 Roy et al 19 showed that TiO 2 can be a good interface material as it has nearly zero conduction band offset.…”

“…16,17 More recently, several authors have argued that a dipole at the metal-semiconductor interface [18][19][20][21] or trapped charge in the interfacial layer will also alter the barrier height. 22 Roy et al 19 showed that TiO 2 can be a good interface material as it has nearly zero conduction band offset. The materials with low electron barrier height and low dielectric constant would be the suitable interface material for low specific contact resistivity at the interface.…”