Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)

Vatajelu, Elena-Ioana; Natale, Giorgio Di; Anghel, Lorena

doi:10.1109/vts.2019.8758653

Cited by 30 publications

(20 citation statements)

References 37 publications

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“…et al, 2019 ; El-Sayed et al, 2020 ). Vatajelu E. et al (2019) reported and analyzed different generic fault models that could exist in SNN hardware implementation. We chose the synaptic SAF model in this study since it appears very often in hardware, especially in the promising and newly emerging analog devices, and it has a profound impact on hardware performance ( El-Sayed et al, 2020 ; Kwon et al, 2020 ; Zhang B. et al, 2020 ).…”

Section: Resultsmentioning

confidence: 99%

Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

et al. 2021

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Various hypotheses of information representation in brain, referred to as neural codes, have been proposed to explain the information transmission between neurons. Neural coding plays an essential role in enabling the brain-inspired spiking neural networks (SNNs) to perform different tasks. To search for the best coding scheme, we performed an extensive comparative study on the impact and performance of four important neural coding schemes, namely, rate coding, time-to-first spike (TTFS) coding, phase coding, and burst coding. The comparative study was carried out using a biological 2-layer SNN trained with an unsupervised spike-timing-dependent plasticity (STDP) algorithm. Various aspects of network performance were considered, including classification accuracy, processing latency, synaptic operations (SOPs), hardware implementation, network compression efficacy, input and synaptic noise resilience, and synaptic fault tolerance. The classification tasks on Modified National Institute of Standards and Technology (MNIST) and Fashion-MNIST datasets were applied in our study. For hardware implementation, area and power consumption were estimated for these coding schemes, and the network compression efficacy was analyzed using pruning and quantization techniques. Different types of input noise and noise variations in the datasets were considered and applied. Furthermore, the robustness of each coding scheme to the non-ideality-induced synaptic noise and fault in analog neuromorphic systems was studied and compared. Our results show that TTFS coding is the best choice in achieving the highest computational performance with very low hardware implementation overhead. TTFS coding requires 4x/7.5x lower processing latency and 3.5x/6.5x fewer SOPs than rate coding during the training/inference process. Phase coding is the most resilient scheme to input noise. Burst coding offers the highest network compression efficacy and the best overall robustness to hardware non-idealities for both training and inference processes. The study presented in this paper reveals the design space created by the choice of each coding scheme, allowing designers to frame each scheme in terms of its strength and weakness given a designs’ constraints and considerations in neuromorphic systems.

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Section: Resultsmentioning

confidence: 99%

Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

et al. 2021

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“…Fault injection experiments showing the vulnerability of SNNs to hardware-level faults have been presented in [6], [7], [11]. A built-in self-test strategy is proposed for a biologicallyinspired spiking neuron in [7].…”

Section: Introductionmentioning

confidence: 99%

Neuron Fault Tolerance in Spiking Neural Networks

Spyrou¹,

El-Sayed²,

Afacan³

et al. 2021

2021 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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The error-resiliency of Artificial Intelligence (AI) hardware accelerators is a major concern, especially when they are deployed in mission-critical and safety-critical applications. In this paper, we propose a neuron fault tolerance strategy for Spiking Neural Networks (SNNs). It is optimized for low area and power overhead by leveraging observations made from a largescale fault injection experiment that pinpoints the critical fault types and locations. We describe the fault modeling approach, the fault injection framework, the results of the fault injection experiment, the fault-tolerance strategy, and the fault-tolerant SNN architecture. The idea is demonstrated on two SNNs that we designed for two SNN-oriented datasets, namely the N-MNIST and IBM's DVS128 gesture datasets.

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“…In this way we have defined the following fault models: DSF (dead synapse fault), DPF (degraded plasticity fault), SSA0, SSA1 (Synaptic stuck-at-0, Synaptic stuck-at-1), DNF (dead neuron fault), ISLIF, OSLIF (input/output stuck lateral inhibition fault), IDSF and ODSF (input/output delayed spike fault), IDSAF and ODSAF (input/output delayed synapse activation fault), IDLIF and ODLIF (input/output delayed lateral inhibition fault). A complete description of the defined fault models is presented in [50].…”

Section: Neuromorphic Computing Paradigms and Test/reliability Ismentioning

confidence: 99%

Rebooting Computing: The Challenges for Test and Reliability

Bosio

O’Connor

Rodrigues

et al. 2019

2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

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Today's computer architectures and semiconductor technologies are facing major challenges making them incapable to deliver the required features (such as computer efficiency) for emerging applications. Alternative architectures are being under investigation in order to continue deliver sustainable benefits for the foreseeable future society at affordable cost. These architectures are not only changing the traditional computing paradigm (e.g., in terms of programming models, compilers, circuit design), but also setting up new challenges and directions on the way these architectures should be tested to guarantee the required quality and reliability levels. This paper highlights the major open questions regarding test and reliability of three emerging computing paradigms being approximate computing, computation-in-memory and neuromorphic computing.

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Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)

Cited by 30 publications

References 37 publications

Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

Neuron Fault Tolerance in Spiking Neural Networks

Rebooting Computing: The Challenges for Test and Reliability

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