2017
DOI: 10.1002/pip.2978
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Solar cell efficiency tables (version 51)

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Cited by 788 publications
(491 citation statements)
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“…We also found that device annealing at a higher temperature of 400 • C also results in low device performance due to the decreased V oc and FF. This may be attributed to the enlarged voids and oxidation of CdTe at high temperatures, which is consistent with the previous report [12]. The solar cells with the ZnSe NCs buffer layer annealed at 370 • C exhibits the best device performance, which includes a J sc of 11.94 mA/cm 2 , a V oc of 0.63 V, a FF of 40.79%, and a PCE of 3.07%.…”
Section: Resultssupporting
confidence: 79%
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“…We also found that device annealing at a higher temperature of 400 • C also results in low device performance due to the decreased V oc and FF. This may be attributed to the enlarged voids and oxidation of CdTe at high temperatures, which is consistent with the previous report [12]. The solar cells with the ZnSe NCs buffer layer annealed at 370 • C exhibits the best device performance, which includes a J sc of 11.94 mA/cm 2 , a V oc of 0.63 V, a FF of 40.79%, and a PCE of 3.07%.…”
Section: Resultssupporting
confidence: 79%
“…Therefore, the device with ligand treatment will show less current leaking. It was reported in our previous work that CdTe NC solar cells with efficiency as high as 5.14% are attained with device configuration of ITO/ZnO/CdS/CdTe/MoOx/Au [12]. Comparing these two devices, the low PCE obtained in the ZnSe NC device is mainly attributed to the low J sc (13.55 mA/cm 2 to 17.26 mA/cm 2 for CdS device) and FF (47.33% to 52.84% for CdS device).…”
Section: Appl Sci 2018 8 X For Peer Review 7 Of 12mentioning
confidence: 99%
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“…For silicon heterojunction (SHJ) solar cells, outstanding efficiencies of 26.7% [2,3] using an interdigitated backcontact (IBC) configuration and 25.1% [4] using a both-sides contacted (BSC) configuration are reported. In the BSC cell design, stacks of intrinsic and doped hydrogenated amorphous silicon (a-Si) layers on both sides of textured ntype silicon wafers are used to form carrier-selective heterojunctions that exhibit excellent passivation properties [5,6].…”
Section: Introductionmentioning
confidence: 99%
“…Several studies of perovskite solar modules have already been reported and, currently, the maximum conversion efficiency is reported to be 16.0% with an aperture area of 16.29 cm. 2,26) However, there is a large divergence of performance between single cells and modules. [27][28][29] More research on perovskite solar modules thus appears to be necessary.…”
Section: Introductionmentioning
confidence: 99%