SOI-LDMOS Transistors With Optimized Partial n<sup>+</sup> Buried Layer for Improved Performance in Power Amplifier Applications

Nikhil, KrishnanNadar Savithry; DasGupta, Nandita; DasGupta, Amitava; Chakravorty, Anjan

doi:10.1109/ted.2018.2867656

Cited by 13 publications

(3 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…T HE lateral double-diffused metal-oxide-semiconductor (LDMOS) based on the silicon-on-insulator (SOI) structure is one of the key devices that determine the performances of the whole power integrated circuit [1]. With the rapid development of the power IC industry, LDMOS has been widely adopted due to its great compatibility with CMOS processes [2].…”

Section: Introductionmentioning

confidence: 99%

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

Yao

Sun

et al. 2023

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

The silicon-on-insulator (SOI) lateral doublediffused metal-oxide-semiconductor (LDMOS) with high-k multi-fingers (HKMFs) is proposed and investigated. The fingertips are distributed at specific locations to modulate the electric field distributions and improve the device performances. First, the electric field peaks formed at the fingertips could optimize the electric field distributions, which improves the breakdown voltage (BV) of the LDMOS effectively. Meanwhile, the multi-fingers are embedded into the drift region to increase the optimal drift doping concentration, which facilitates the positive conduction of the device and reduces the specific ON-resistance (R on,sp ). The simulation results show that the proposed HKMF-LDMOS with five multi-fingers increases the BV by 59.2%, reduces R on,sp by 37.8%, and improves the figure of merit (FOM) by 4.07 times when compared to the conventional LDMOS.

show abstract

Section: Introductionmentioning

confidence: 99%

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

Yao

Sun

et al. 2023

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

show abstract

“…The mass production of consumer electronic devices has recently increased the demand for power integrated circuits [1], [2], [3]. Silicon-based laterally-diffused metaloxide-semiconductor (LDMOS) field-effect transistors are widely used in low-voltage to high-voltage power electronic applications [4], [5], [6], [7], [8], [9]. LDMOS can easily be integrated with bipolar junction transistors and CMOS technology.…”

Section: Introductionmentioning

confidence: 99%

Algorithmic Optimization of Transistors Applied to Silicon LDMOS

Chuang,

Saadat,

Van De Put

et al. 2023

IEEE Access

View full text Add to dashboard Cite

We propose a pioneering approach that integrates optimization algorithms and technology computer-aided design to automatically optimize laterally-diffused metal-oxide-semiconductors (LDMOS) with a field-oxide structure. We define the ratio of the square of the breakdown voltage divided by the specific on-resistance as the figure-of-merit (FOM) and the objective function of our optimization. We compare the performance of three different algorithms: Nelder-Mead, Powell, and Bayesian Optimization. We show how the LDMOS performance evolves as each of the three optimization algorithms reach their optimized structure. We show that a straightforward Nelder-Mead optimization leads to a local optimum when optimizing over six input parameters. We find that Bayesian Optimization is the most data-efficient method to find the global optimized structure in the multi-domain design space.INDEX TERMS Bayesian optimization, LDMOS, nelder-mead algorithm, power semiconductor device, powell algorithm, step gate field oxide structure.

show abstract

“…Laterally-Diffused Metal-Oxide-Semiconductor (LDMOS) field-effect transistors are commonly used in lowvoltage [1], [2], mid-voltage [3], [4], and high-voltage [5]- [8] applications because of their promising performance and their use of silicon technology. Ever growing commercial applications of LDMOS transistors has attracted much attention in the research community [9]- [11].…”

Section: Introductionmentioning

confidence: 99%

LDMOS Drift Region With Field Oxides: Figure-of-Merit Derivation and Verification

Saadat

Put

Edwards

et al. 2022

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

We analytically and numerically investigate the performance of Laterally-Diffused Metal-Oxide-Semiconductor (LDMOS) transistors with Semi-circular Field OXide (S-FOX) focusing on midvoltage (30 V -100 V) power applications. We derive an analytical relation between breakdown voltage and on-resistance to realize the ideal behavior of the drift region for an LDMOS with S-FOX. Then, we find the optimized drift doping concentration minimizing the on-resistance at a given breakdown voltage. We introduce a new figure-of-merit for the drift region of a lateral device with S-FOX. We finally verify our ideal analytical findings with numerical results modeled and simulated in a commercial Technology Computer-Aided Design (TCAD).

show abstract

SOI-LDMOS Transistors With Optimized Partial n⁺ Buried Layer for Improved Performance in Power Amplifier Applications

Cited by 13 publications

References 19 publications

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

Algorithmic Optimization of Transistors Applied to Silicon LDMOS

LDMOS Drift Region With Field Oxides: Figure-of-Merit Derivation and Verification

Contact Info

Product

Resources

About

SOI-LDMOS Transistors With Optimized Partial n+ Buried Layer for Improved Performance in Power Amplifier Applications

Cited by 13 publications

References 19 publications

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

Algorithmic Optimization of Transistors Applied to Silicon LDMOS

LDMOS Drift Region With Field Oxides: Figure-of-Merit Derivation and Verification

Contact Info

Product

Resources

About

SOI-LDMOS Transistors With Optimized Partial n⁺ Buried Layer for Improved Performance in Power Amplifier Applications