SOI device parameter investigation and extraction for VLSI radiation hardness modeling with SPICE

Account for Radiation Effects in Signal Integrity Analysis of PCB Digital Systems

“…Some examples of SPICE MOSFETs and IC modeling with account for radiation effects are described in [7,8]. Our results confirm that IC output voltage slew rate degradation depend on MOSFETs parameters degradation.…”

Analyzing Gamma-Ray Irradiation Effects on Carbon Nanotube Top-Gated Field-Effect Transistors

“…Table shows the mean and standard deviation for the V th , SS, and g m extracted from the transfer curves for all five groups. To explain the trend of the radiation influence, we can use the model proposed by Petrosjanct to describe the change in threshold voltage, SS, and g m as follows Here, C ox is the top-gate oxide capacitance, Δ Q it is the change in the interface-trapped charges, Δ Q ot is the change in the top-gate oxide charges, C d is the depletion capacitance, which can be neglected for ultrathin channel materials such as CNT films, C it is the interface trap capacitance, k is the Boltzmann constant, T is the temperature, and q is the electronic charge. The interface trap capacitance ( C it ) can be calculated using eq .…”

“…According to the model proposed by Petrosjanct, the densities of trapped charges in the gate oxide and at the interface can be described as follows Here, N ot is the density of trapped charges in the gate oxide, N it is the density of trapped charges at the interface, D is the total radiation dose, and A ot , B ot , A it , and B it are fitting coefficients. In this case, the shift in the threshold voltage is calculated from the equation We can simplify eq by adding the trapped charge densities in the gate oxide and at the interface together as N tot The C ox used in eq can be calculated using a parallel-plate capacitor model as follows According to eqs and , the radiation-induced threshold voltage shifts of different kinds of samples can be fitted through pure numerical fitting models, as shown in Figure e–g, which are in accord with the experimental results (the statistical experiment results were extracted from 10 devices).…”

Improved Model on Buried-Oxide Damage Induced by Total-Ionizing-Dose Effect for HV SOI LDMOS

“…Subsequently, the N ot distribution is calculable for OFF-state bias condition. Interface traps (N it ) induced by TID are negligible in the evaluation work, due to the fact that it is much less than N ot and plays a trivial role [D < 1 Mrad(Si)] [16].…”