Software-based self-testing of microprocessors

Sosnowski, J.

doi:10.1016/j.sysarc.2005.05.004

Cited by 19 publications

(9 citation statements)

References 31 publications

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“…We plan to develop application based tests for programs with more complex control flow. In particular, we can use here various structural coverage metrics (compare [23]) to select representative input data. This can be also combined with structural and pseudorandom testing schemes [23].…”

Section: Testing Schemesmentioning

confidence: 99%

Tracing Fault Effects in FPGA Systems

Węgrzyn¹,

Sosnowski²

2014

International Journal of Electronics and Telecommunications

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Abstract-The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets -SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.

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Section: Testing Schemesmentioning

confidence: 99%

Tracing Fault Effects in FPGA Systems

Węgrzyn¹,

Sosnowski²

2014

International Journal of Electronics and Telecommunications

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“…Similarly in the hardware domain, a few decades of research lead to the development of promising approaches. For example, Sosnowski [17] presents a concept to merge hardware and software efforts. He argues that in hardware-related design approaches, built-in-self-test (BIST) and design-for-testability (DFT) mechanisms are currently well practiced [17].…”

Section: Related Workmentioning

confidence: 99%

“…For example, Sosnowski [17] presents a concept to merge hardware and software efforts. He argues that in hardware-related design approaches, built-in-self-test (BIST) and design-for-testability (DFT) mechanisms are currently well practiced [17]. These are developed dynamically and frequently used in chips and microprocessors.…”

Section: Related Workmentioning

confidence: 99%

“…Also, BISTs are not effective in testing time-related faults (e.g., delay, cross-interactions faults). Thus, software-based selftesting (SBST) processor instructions [17] have emerged and are used as a vehicle for testing functional blocks in hardware. The only cost of such a test is the required memory space and a longer test time than in the BISTs.…”

Section: Related Workmentioning

confidence: 99%

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Model-based testing for execution algorithms in the simulation of cyber-physical systems

Zander

2013

2013 Ieee Autotestcon

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The understanding of simulation semantics of a hybrid system is a challenge for computational engineers as it requires expertise in computer science, engineering, numerical methods, and mathematics at once. The testing methods for the execution of a simulation are being researched but not yet applied on the industrial level. Consequently, the semantics of the simulation becomes a critical artifact in the system development process. Embracing it from multiple design perspectives is going to create positive implications at the model, software, and hardware level. Hence, a set of self-testing algorithms for the simulation execution are proposed. Deploying them requires an inclusion of an additional testing dimension in the typical V diagram. Thus, a systematic methodology is conceptualized. A prototypical implementation takes advantage of the Simulink ® (1) simulation loop and (2) simulation state retrieval during the system model execution. These two artifacts allow to control and monitor the execution of a simulation. As a consequence, the semantics is systematically considered, its correctness is tested, and the numerical approximation is examined. A case study of a Cyber-Physical System illustrates conceptual and methodological aspects of the proposed algorithms.The ever growing pervasion of software-intensive systems into physical, technical, business, and social areas not only consistently increases the number of requirements on system functionality and features, but also puts forward ever stricter demands on system quality, reliability, safety, usability, etc. For example, Cyber-Physical Systems (CPS) [1], frequently characterized as smart systems include digital cyber technologies, software, and physical components and are intelligently interacting with other systems across information and physical interfaces. They are expressing an emerging behavior and so, create even more functionalities during the deployment ('live') to collaborate with each other more efficiently. CPS are sensing the external world and they immediately react on the state of the surrounding. Thus, in order to successfully develop such complex systems of systems and to additionally remain competitive, early and continuous consideration and assurance of system quality is becoming of vital importance.A challenging element of a CPS development process is its design phase. Here, selected features have to be accounted for and yet the entirety of the system has to be simulated in order to obtain knowledge and understanding about the dynamics and functionality of the system. This simulation, in turn, requires selected numerical integration methods (e.g., based on differential equations, difference equations, discrete events, discrete states, etc.[2]). Those methods include selected solvers and algorithms such as, control algorithms, optimization algorithms, integration and delay blocks, continuous-time elements, discrete-time elements, discreteevent elements, etc. to execute the system models. Thus, creating a CPS design implies a lot of algorit...

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“…On activation of any of these traps, a full system reset of the microcontroller should be forced. On system boot-up/reset, the microcontroller should perform -at minimum -the following software-based self-tests [24]:…”

Section: Runtime Behaviormentioning

confidence: 99%