So what is an optimal test mix? A discussion of the SEMATECH methods experiment

IDDQ data analysis using neighbor current ratios

“…This distinction is made to understand the distribution of NCRs and CRs in different categories and understand if certain chips get detected by one method but not by the other and rejection rate of healer chips. Since the 5 lA test limit does not represent a ''good'' manufacturing limit [12], the difference in I DDQ -only failed chips detected by one method but not the other would be statistically significant to draw meaningful conclusions.…”

“…The analysis is performed using SEMATECH data [12]. We consider eight neighboring dice for each die.…”

“…Fig. 2 shows the current ratios for SEMA-TECH chips that passed all wafer tests (11 263 chips) and that failed the 5 lA I DDQ test (1689 chips) [12]. The majority of all-pass chips have small ratios (<3).…”

X-IDDQ: A Novel Defect Detection Technique Using IDDQ Data

“…A SEMATECH study [14] was undertaken to determine the relative effectiveness of different testing methodologies. Although some defective ICs were detected by more than one test methods, the study concluded that all test techniques uniquely detected some class of defects and none of them might be dropped in favor of some other technique [15]. Manufacturers, therefore, need a variety of tests in their test suite to screen defective ICs.…”

IDDQ data analysis using current signature

“…Research has shown that some chips that failed Boolean tests had low IDDQ and thus escaped the IDDQ tests [7]. To reduce test escapes when only IDDQ tests are applied, we propose an improved method for analyzing IDDQ current signatures.…”