Small-signal operation of semiconductor devices including self-heating, with application to thermal characterization and instability analysis

Rinaldi, N.

doi:10.1109/16.902734

Cited by 70 publications

(28 citation statements)

References 28 publications

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“…The transcapacitance C DG shows a similar effect, but here also the sign of the measured capacitance changes. The effects on C DD and C DG are due to the delay in the heat transport from device to heat sink, and are similar to the self-heating effect on bipolar-transistor capacitances, which has been predicted theoretically in [9]. A mathematical derivation for the MOSFET/FinFET case leads to…”

Section: S-parameter Measurementssupporting

confidence: 58%

Experimental assessment of self-heating in SOI FinFETs

Scholten

Smit

Pijper

et al. 2009

2009 IEEE International Electron Devices Meeting (IEDM)

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In this paper, it is shown that self-heating causes a gigantic effect on the capacitances of MOSFETs/FinFETs. The effect is used to determine the SOI FinFET thermal impedance and to determine the temperature rise during FinFET operation. IntroductionFinFETs are regarded as prospective replacements for bulk-CMOS devices beyond the 22-nm node. Due to the poor thermal conductivity of some of the materials used in FinFET fabrication, and due to the confined nature of the FinFET geometry, self-heating is expected to be more significant in FinFETs than in their bulk-CMOS counterparts, affecting not only device performance, but also NBTI and oxide reliability [1,2]. To the best of the authors' knowledge, all studies on FinFET self-heating so far are based on simulations [1,3,4], and experimental assessment is lacking. In this paper, we will (i) show that self-heating causes a gigantic effect on the capacitances C DD and C DG , (ii) use that effect as an ultra-sensitive method to extract the frequency-dependent complex thermal impedance Z th (f ), and (iii) determine the temperature rise in our SOI FinFETs and its impact on the device performance.

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Section: S-parameter Measurementssupporting

confidence: 58%

Experimental assessment of self-heating in SOI FinFETs

Scholten

Smit

Pijper

et al. 2009

2009 IEEE International Electron Devices Meeting (IEDM)

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“…The point of onset of thermal instability can be detected in the current-controlled Gummel plot as the boundary point between the positive and the negative differential resistance region (flyback point or snapback point). This critical point is found as the biasing point for which [23] (10) that is equivalent to [7], [11], [24] (11)…”

Section: Model For the Critical Junction Temperaturementioning

confidence: 99%

A Back-Wafer Contacted Silicon-On-Glass Integrated Bipolar Process—Part II: A Novel Analysis of Thermal Breakdown

Nenadovic

d’Alessandro

Nanver

et al. 2004

IEEE Trans. Electron Devices

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Abstract-Analytical expressions for the electrothermal parameters governing thermal instability in bipolar transistors, i.e., thermal resistance TH , critical temperature crit and critical current C crit , are established and verified by measurements on silicon-on-glass bipolar NPNs. A minimum junction temperature increase above ambient due to selfheating that can cause thermal breakdown is identified and verified to be as low as 10-20 C.The influence of internal and external series resistances and the thermal resistance explicitly included in the expressions for crit and C crit becomes clear. The use of the derived expressions for determining the safe operating area of a device and for extracting the thermal resistance is demonstrated.

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“…Frequency dependence of the real and imaginary parts of the Y 22 parameter is analysed. Real part of thermal impedance (thermal resistance) is proportional to the conductance difference at low and high frequencies according to [9]:…”

Section: Introductionmentioning

confidence: 99%