Single InAs/GaSb Nanowire Low-Power CMOS Inverter

Abstract

III-V semiconductors have so far predominately been employed for n-type transistors in high-frequency applications. This development is based on the advantageous transport properties and the large variety of heterostructure combinations in the family of III-V semiconductors. In contrast, reports on p-type devices with high hole mobility suitable for complementary metal-oxide-semiconductor (CMOS) circuits for low-power operation are scarce. In addition, the difficulty to integrate both n- and p-type devices on the same substrate without the use of complex buffer layers has hampered the development of III-V based digital logic. Here, inverters fabricated from single n-InAs/p-GaSb heterostructure nanowires are demonstrated in a simple processing scheme. Using undoped segments and aggressively scaled high-κ dielectric, enhancement mode operation suitable for digital logic is obtained for both types of transistors. State-of-the-art on- and off-state characteristics are obtained and the individual long-channel n- and p-type transistors exhibit minimum subthreshold swings of SS = 98 mV/dec and SS = 400 mV/dec, respectively, at V(ds) = 0.5 V. Inverter characteristics display a full signal swing and maximum gain of 10.5 with a small device-to-device variability. Complete inversion is measured at low frequencies although large parasitic capacitances deform the waveform at higher frequencies.

Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

“…We do not expect significant short-channel effects in our devices, and accordingly, the threshold shift direction is opposite that expected for drain-induced barrier lowering (DIBL). The threshold shift direction is instead indicative of the increased I sd that naturally follows increased V sd at fixed V g , consistent with other nanowire transistors [5,10]. Finally, we comment briefly on the field-effect mobility for our device.…”

“…This is caused by several key challenges for p-type devices including lower intrinsic carrier mobility and difficulties in growth, doping and fabrication of high quality ohmic contacts and gates. Hence III-V nanowire CMOS typically features p-type transistors far less ideal than their n-type counterparts [5,10,11]. Here we present polymer electrolyte gated Be-doped p + -GaAs NWFETs with near-thermal limit gating that point out a path to filling this significant performance gap.…”

Surfactant-assisted chemical vapour deposition of high-performance small-diameter GaSb nanowires

“…Although significant progress has been made in the manipulation of NW nucleation and composition in both binary and ternary systems 9,10 , it is still challenging to control the morphology and size of NWs on length scales ranging from the atomic upwards, particularly for the technologically important III-Sb NWs. In general, the growth of III-Sb NWs has proven difficult from small-diameter catalyst particles in various chemical vapour deposition (CVD) techniques [11][12][13] and others, yielding larger diameters than the corresponding III-As NWs [14][15][16] . This is mainly because of the required high precursor partial pressures and large atomic size of Sb.…”

“…For example, miniaturized InSb NWs have just been demonstrated for the generation and detection of Majorana fermions [18][19][20] . GaSb NWs are of great interest for single hole transistors in spintronics and highperformance device structures in electronics 15,16,21 , where the small diameter could reduce the carrier thermalization and enhance the performance by better gate electrostatic coupling as well as less scattering. In this regard, minimizing the uncontrolled radial NW growth via the manipulation of corresponding surface energies is an important step towards the practical implementation of III-Sb NW devices with the optimized performance.…”

Generic technique to grow III-V semiconductor nanowires in a closed glass vessel

“…1,2 Based on these nanowires, functional nanodevices, such as field effect transistors, [3][4][5] optoelectronic detectors, [6][7][8] solar cells, 9,10 light-emitting diodes, [11][12][13] and gas sensors, 14,15 have been designed and fabricated. These III-V semiconductor nanowires, especially those with narrow band gaps, have also been used to construct hybrid quantum structures for the study of novel physics phenomena such as Majorana bound states in topological superconducting systems.…”