Single‐Cell Stateful Logic Using a Dual‐Bit Memristor

Abstract

By combining the functions of Boolean gates and non‐volatile memory, stateful logic may enable significant savings in time and energy for computational processes that can be performed directly in main memory and for data analyses in edge environments. A simple reduction to practice this concept is demonstrated by Borghetti et al. in 2010 via a material implication logic gate comprising two parallel memristors and a conditional write operation. Here, a single physical dual‐bit memristor, possessing both bipolar and unipolar resistance switching characteristics and utilizing their operations, is demonstrated. This device responds to a conditional write to perform not only implication but multiple other logic functions when configured with a series resistor and addressed with a specific voltage pulse. The simple circuit structure of this dual‐bit memristor allows compact sequential logic cascading along the time dimension without a concern of multiple cell accessing related issues. The sequence of implementing a full‐adder is also discussed.

Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System Perspectives

“…According to the available stable resistance states, RRAM can be categorized into two types: analog RRAM denotes those devices whose resistances can be programmed to any value between the highest resistance state (HRS) and the lowest resistance state (LRS), whereas binary RRAM behaves as a normal memory device with a stable HRS and LRS. [48][49][50][51][52][53][54] Binary inputs are stored into RRAM devices as the resistance (conductance) before performing computation. As early as in 2009, a 1 kb RRAM array in a one-transistor-one-RRAM (1T1R) cell structure was successfully integrated with CMOS read/write circuits.…”

Time‐Efficient Stateful Dual‐Bit‐Memristor Logic

“…This configuration requires a huge data transition between the memory and the CPU, which limits the computation speed and energy efficiency . To overcome such issue, various emerging computing paradigms based on new materials and devices were proposed for the future information technology . One of the most attractive methods is memristor‐based logic‐in‐memory (LIM) strategy, for which sequential logic operations are performed directly on the bits stored in a memory array without moving data to a processor .…”

“…The TiO 2 DBM possesses two different types of switching mode (thermionic unipolar resistance switching [URS] and electronic bipolar switching [e‐BRS]) in a single cell. The two memristive states can be used for the two data bits and the stateful logic operation utilizing them could execute 12 different single‐step Boolean logic operations (including TRUE, FALSE, OR, AND, and IMP gates) by controlling the applied voltage ( V A ) and the series resistance ( R S ) . Then, a sequential combination of the 12 gate operations could produce all the 16 Boolean logic functions.…”

“…In the previous stateful DBM logic, it followed the general rule for defining the logical states. However, in the DBM, the four states ([00], [01], [10], [11]) are not to be considered separately as two states of two memristors, but the four states can be assigned to any logical values . For example, when there are four possible resistance states as HH (R1), HL (R2), LH (R3), and LL (R4), which are obtained by the LRS and HRS of the URS and e‐BRS of the DBM, they can be assigned to the logic states (00), (01), (11), and (10), respectively.…”

“…In previous stateful DBM logic, a buffer bit strategy was used to flexibly achieve logic cascading, as shown in Figure S2, Supporting Information, which demonstrates how the one‐bit full adder can be realized using three DBMs and one variable R S . In this circuit, one of the two bits of the DBM is defined as a buffer bit, which is used as the temporal space for data delivery but not for the permanent data bit (see SI‐II.…”