2023
DOI: 10.1038/s41467-023-41363-x
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Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

Jun Yu,
Han Wang,
Fuwei Zhuge
et al.

Abstract: As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the ‘speed-retention-endurance’ dilemma, their typical speed is limited to ~microseconds to milliseconds for program and erase operations, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10–100 ns) and robust (endurance>106 cycles, retention>10 years) memory op… Show more

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Cited by 10 publications
(11 citation statements)
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“…[ 23,36,38,42,53,57,61,62,68,69,72,74–92 ] The orange dashed line in the picture indicates the IRDS requirements for NVM, [ 46 ] note that the ON/OFF ratio is not a strictly defined parameter but is generally considered as ≈10 2 . [ 93 ] The datapoints of the memristors based on 2D monolayer materials are highlighted by the pink background.…”
Section: Application Of 2d Monolayer Materials In Vertical Resistive ...mentioning
confidence: 99%
“…[ 23,36,38,42,53,57,61,62,68,69,72,74–92 ] The orange dashed line in the picture indicates the IRDS requirements for NVM, [ 46 ] note that the ON/OFF ratio is not a strictly defined parameter but is generally considered as ≈10 2 . [ 93 ] The datapoints of the memristors based on 2D monolayer materials are highlighted by the pink background.…”
Section: Application Of 2d Monolayer Materials In Vertical Resistive ...mentioning
confidence: 99%
“…[23,29] Based on the measured float gate potential, we expect a high charge density ≈9.7 × 10 12 cm −2 induced in MoS 2 channel, which is almost an order higher than previous MoS 2 float gate transistors operated via control gate. [30] According to the capacitance coupling that ignores the capacitance of depleted semiconductor channel C s (Figure 2d), V FG is directly governed by the applied V DS and stored charge Q FG in float gate by the following relationship.…”
Section: Threshold Switching Memory In Two-terminal Float Gate Transi...mentioning
confidence: 99%
“…1,2 Low-dimensional van der Waals (vdW) ferroelectric materials have advantages over their three-dimensional counterparts in terms of lower energy consumption and higher response speed, 3–11 providing a more promising platform for ferroelectric device applications. 12–15 In this regard, atomic thickness ferroelectric tunnel junctions (FTJs), 16–21 with the inherent advantage of device miniaturization, have been proposed.…”
Section: Introductionmentioning
confidence: 99%