2015
DOI: 10.1364/oe.23.033634
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Silicon-integrated short-wavelength hybrid-cavity VCSEL

Abstract: Abstract:We demonstrate a short-wavelength hybrid-cavity vertical-cavity surface-emitting laser (VCSEL) heterogeneously integrated on silicon. A GaAs-based "half-VCSEL" has been attached to a dielectric distributed Bragg reflector (DBR) on a silicon wafer using ultra-thin divinylsiloxanebis-benzocyclobutene (DVS-BCB) adhesive bonding, thereby creating a cavity with the standing-wave optical field extending over the silicon-and GaAs-based parts of the cavity. A 9 µm oxide aperture diameter VCSEL with a threshol… Show more

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Cited by 34 publications
(41 citation statements)
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References 18 publications
(21 reference statements)
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“…Note that in the case of the 20 µm BH-DBR VCSEL, measurements in the low temperature range have not been performed, because such small devices have been partly destroyed with an unintended exposure to moisture. As a usual procedure on VCSEL [6] [9], we proceed to a simple second order polynomial fit to estimate that the minimum threshold is achieved at a temperature of 13°C for such a device. For the 100 µm BH-DBR VCSEL, the minimum threshold is measured at a temperature of 0°C.…”
Section: Tshec Vcsel Characterizationsmentioning
confidence: 99%
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“…Note that in the case of the 20 µm BH-DBR VCSEL, measurements in the low temperature range have not been performed, because such small devices have been partly destroyed with an unintended exposure to moisture. As a usual procedure on VCSEL [6] [9], we proceed to a simple second order polynomial fit to estimate that the minimum threshold is achieved at a temperature of 13°C for such a device. For the 100 µm BH-DBR VCSEL, the minimum threshold is measured at a temperature of 0°C.…”
Section: Tshec Vcsel Characterizationsmentioning
confidence: 99%
“…Starting from the 3D integration in microelectronics, bonding processes are commonly used in the fabrication of micro electro-mechanical systems [1], in heat flow management for high power transistors or photonic devices [2], [3], and more recently in the emerging development of silicon photonics and heterogeneous integration of III-V compounds on a mature silicon platform [4] [5] [6]. In most cases, the bonding of two (or more) different (or not) substrates allows improving the device performances, or the emergence of new components and functionalities which would otherwise not be possible.…”
Section: Introductionmentioning
confidence: 99%
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“…В случае из-готовления ДВ ВИЛ по второй технологии полупровод-никовая гетероструктура обычно выращивается на под-ложке InP [21]. Для совмещения преимуществ ДВ ВИЛ на основе GaAs и ДВ ВИЛ на основе InP была предло-жена технология спекания пластин с гетероструктурами в различных системах материалов: РБО AlGaAs/GaAs и активная область InGaAs/InP [20][21][22][25][26][27][28][29][30]. В этом случае предварительно на двух подложках из GaAs выра-щиваются РБО, затем на подложке из InP выращивается активная область с квантовыми ямами (КЯ).…”
Section: Introductionunclassified