Silicon-Based Floating-Body Synaptic Transistor With Frequency-Dependent Short- and Long-Term Memories

Kim, Hyungjin; Park, Jungjin; Kwon, Min-Woo; Lee, Jong-Ho

doi:10.1109/led.2016.2521863

Cited by 70 publications

(48 citation statements)

References 25 publications

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“…[ 4–10 ] Besides two‐terminal memristors, a variety of three‐terminal or four‐terminal artificial synapses, called synaptic transistors, have been investigated because the drain current changes by gate biasing corresponds to the synaptic weight modulation. [ 11–20 ] Thanks to multi‐terminal configuration, the synaptic transistors enable to update synaptic weight by gate biasing during performing signal processing by drain biasing. In addition, the wide range of drain current with respect to gate and drain voltages provides substantial change of synaptic weight for reliable training operation.…”

Section: Introductionmentioning

confidence: 99%

Nonvolatile Memory and Artificial Synaptic Characteristics in Thin‐Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer

Lee

Beom

Kim

et al. 2020

Adv Elect Materials

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Nonvolatile memory and synaptic characteristics in thin‐film transistors (TFTs) with HfOx gate insulator and ZnO channel are investigated for the application to nonvolatile memory and artificial synapse in neuromorphic systems. Nonvolatile change of drain current induced by modulated gate stack properties is demonstrated to be applicable to nonvolatile memory operation. It also emulates synaptic weight change for learning and memory functions in artificial synapses. The TFTs with HfOx and ZnO layers deposited by sputtering or atomic layer deposition (ALD) at low temperatures exhibit tunable drain current upon applying gate pulses, featuring analog, reversible, nonvolatile changes with respect to pulse amplitude, width, interval, and repetition number. However, the TFTs with HfOx and ZnO by ALD at high temperatures show negligible change. The structural and chemical analyses reveal similarities in defective nature of sputter‐deposited and low‐temperature ALD HfOx and ZnO layers, leading to analogous drain current modulation. Also, the results of temperature‐ and voltage polarity‐dependent drain current changes and capacitance changes verify that the drain current modulation is driven by oxygen ion migration associated with defective states of HfOx and ZnO layers. It demonstrates feasibility of application of ALD‐HfOx/ZnO TFTs to nonvolatile memory and artificial synapses using modulated gate stack properties.

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Section: Introductionmentioning

confidence: 99%

Nonvolatile Memory and Artificial Synaptic Characteristics in Thin‐Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer

Lee

Beom

Kim

et al. 2020

Adv Elect Materials

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“…In spite of this structure, the program operation can still be performed by CHEI at the source side; as for the erase operation, instead, a positive voltage is applied between the gate and source, resulting in the emission of stored electrons toward the gate by FN tunneling. Although, recently, some more effort was devoted to build new custom synaptic devices and test them in SNNs [49][50][51], a more convincing proof of the feasibility of the floating-gate transistor to build large-scale neuromorphic systems comes from a different approach. The basic idea consists in slightly modifying the routing of commercially available NOR Flash memory arrays to enable a single-cell selective erase operation while keeping the cell structure unchanged.…”

Section: Memory Transistors As Synaptic Devices In Artificial Neural mentioning

confidence: 99%

Memristive and CMOS Devices for Neuromorphic Computing

et al. 2020

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Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

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“…Therefore, we can regard the threshold voltage shift as the synaptic weight change. Many prior studies have developed synaptic devices with floating-gate or charge-trapping memories, e.g., a metal-oxide-nitride-oxide-semiconductor (MONOS) structure, to implement SNN circuits [7], [8]. Both floating-gate and charge-trapping memories are suitable for large-scale SNNs owing to their simple one-transistor structure compared with other non-volatile memories, such as phase-change random-access memory, resistive random-access memory, and spin-orbit torque switching [9]- [12].…”

Section: Generation Of Stdp With Non-volatile Tunnel-fet Memory For Lmentioning

confidence: 99%

Generation of STDP With Non-Volatile Tunnel-FET Memory for Large-Scale and Low-Power Spiking Neural Networks

Kino

Fukushima

Tanaka

2020

IEEE J. Electron Devices Soc.

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Spiking neural networks (SNNs) have attracted considerable attention as next-generation neural networks. As SNNs consist of devices that have spike-timing-dependent plasticity (STDP) characteristics, STDP is one of the critical characteristics we need to consider to implement an SNN. In this study, we generated the STDP of a biological synapse with non-volatile tunnel-field-effect-transistor (tunnel FET) memory that has a charge-storage layer and a tunnel FET structure. Tunnel FET is a promising structure to reduce the operation voltage owing to its steep sub-threshold slope. Therefore, the non-volatile tunnel-FET memory we propose enables the implementation of low-operation-voltage SNNs. This paper reports the I-V, programing, and both symmetric and asymmetric STDP characteristics of a non-volatile tunnel-FET memory with p-channel-MOS-like operation.

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Silicon-Based Floating-Body Synaptic Transistor With Frequency-Dependent Short- and Long-Term Memories

Cited by 70 publications

References 25 publications

Nonvolatile Memory and Artificial Synaptic Characteristics in Thin‐Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer

Nonvolatile Memory and Artificial Synaptic Characteristics in Thin‐Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer

Memristive and CMOS Devices for Neuromorphic Computing

Generation of STDP With Non-Volatile Tunnel-FET Memory for Large-Scale and Low-Power Spiking Neural Networks

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