Sign Detection and Number Comparison on RNS 3-Moduli Sets $$\{2^n-1, 2^{n+x}, 2^n+1\}$$ { 2 n - 1 , 2 n + x , 2 n + 1 }

Abstract

Number comparison, sign identification and overflow detection are important operations, especially for digital signal processing, but hard to perform using the residue number system (RNS). In this paper, a new method is proposed for sign identification and number comparison based on an optimized version of the mixed radix conversion for the augmented 3-moduli sets {2 n + 1, 2 n − 1, 2 n+x }(0 ≤ x ≤ n). Notably, most of the computations are directly performed on the moduli channels, thus allowing to easily adapt this new method to any RNS processor. Accordingly, this paper proposes an efficient unified very large scale integration architecture based on the presented methodology, which can be used not only to design application specific integrated circuits (ASICs) but also to configure field-programmable gate arrays (FPGAs). The implementation results that were obtained using 65 nm CMOS technologies show that the proposed architecture provided comparators that are more efficient than the related state of the art, by considering as a figure of merit the area time product. More specifically, the considered ASIC and FPGA implementations provide relative improvements in the efficiency of up to 57 and 38 %, respectively. The experimental assessment also shows that the power consumption of the proposed This work was supported by national funds through FCT (Fundação para a Ciência e a Tecnologia) under project UID/CEC/50021/2013 and by the Ph.D. Grant with reference SFRH/BD/103791/2014. Electronic supplementary material The online version of this article (Circuits Syst Signal Process circuits is significantly lower than the related state of the art, with relative reductions of up to 50 %.

Fast Large Integer Modular Addition in GF(p) Using Novel Attribute-Based Representation

“…The purple curve with right-pointing triangle markers represents the delay for the binary KSA adder. As expected, the binary KSA adder achieved better performance than the binary RCA adder and its delay increases as the field size m increases due to the increase in the number of iterations required to complete the addition operation according to (31).…”

“…3) It is not easy to compare two numbers in RNS domain to determine equality or inequality [27]- [31]. 4) It is hard to detect an overflow that might happen as a result of an operation [32], [33].…”

A Multi-Layered Data Encryption and Decryption Scheme Based on Genetic Algorithm and Residual Numbers

“…From the block diagram in Fig. 2, the residue set (x 1 , x 2 , x 3 ) is fed into the Operands Preparation Unit (OPU), which prepares and manipulates the parameters in Equations (8), (10), (11) and (13) for appropriate routing of the bits. Therefore, the parameters in Equations (10) and (11) are summed up using CPA2 in order to obtain the second MRD and at the same time, the result in Equation 13is achieved by using CPA1, which is summed together with Equations (14) and (15) using CSA1.…”

“…Residue Number System (RNS) uses remainders from conventional number systems such as the decimal or binary number system for representation. The RNS possesses inherently desirable properties such as parallel computation, and carry free arithmetic; these operations are predominantly used in digital signal processing, cryptography, digital communication and image processing [11]- [13]. The RNS is capable of enhancing schemes in these applications by providing fewer hardware resources, improved delays and power profiles in devices that run on batteries.…”

Single and Multiple Error Detection and Correction using Redundant Residue Number System for Cryptographic and Stenographic Schemes

“…Relatively, reverse conversion is more complex. A general structure of a typical RNS processor [11,12], is shown in Figure . In Figure , data sets in the form of binary or decimal are forward-converted using a forward converter with a set of moduli sets as its processing units into residues. The residues is converted back into binary or decimal through reverse conversion with a reverse converter.…”