Sidewall roughness measurement: a comparison of in- and off-line AFM techniques

Guerry, Angela; Gondran, Carolyn F. H.; Miller, Kirk

doi:10.1109/asmc.2004.1309570

Cited by 3 publications

(5 citation statements)

References 3 publications

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“…This could confirm the agreement on the data between the current study and Dhariwal's experiments when the gap width is larger than 5 µm. On the other hand, the RMS roughness value on the aluminum sidewall in this study could be approximately 5 nm according to Guerry's measurements [19]. Therefore, this could be the rationale for higher electric breakdown voltages being measured on the aluminum electrodes in this study.…”

Section: Resultsmentioning

confidence: 50%

Electrical breakdown phenomena for devices with micron separations

Chen

Yeh

Wang

2006

J. Micromech. Microeng.

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The electric breakdown of gaseous dielectrics predicted by Paschen's law has been successfully employed for the design of insulation among metallic conductors separated by millimeter scale gaps or larger. However, today most electrostatic actuated MEMS devices have been designed and fabricated with micron-scale gaps that lead to a high risk of failure. Paschen's curves measured under macro or meso gaps hereby must be re-examined and carefully evaluated for providing the guidelines of insulation design in MEMS devices. In this paper, geometric configurations commonly employed for MEMS electrodes, typically planar and inter-digitated combs, have been designed and analyzed with commercial software packages. For verification purposes, breakdown voltages were measured on test samples fabricated with metallic, p-type and n-type silicon substrates in standard MEMS processes. The samples were prepared by etching insulation gaps measured from 2 to 21 µm. In conclusion, Paschen's curves for describing the electric breakdown phenomena of gaseous dielectrics were revisited and compared to the published data so that design guidelines of electrical insulation in MEMS actuators are established.

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Section: Resultsmentioning

confidence: 50%

Electrical breakdown phenomena for devices with micron separations

Chen

Yeh

Wang

2006

J. Micromech. Microeng.

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“…Previously, sidewall surface roughness measurements have been reported using specialized tips for the AFM, novel systems incorporating an atomic force probe, or a dual-direction-sensing critical dimension (CD) mode AFM [5,[8][9][10]. However, implementation of those methods can be difficult [11,12] and automated CD mode AFM does not meet the required sub-ångström ( Å) range sensitivity due to tip shape effects and background noise levels [13]. Other works have reported the use of conventional AFM for collecting data on the sidewalls of tall lines in dense line test structures by cleaving and tilting the sample or toppling the lines to expose the sidewall on the top surface [14][15][16].…”

Section: Fin Sidewall Roughnessmentioning

confidence: 99%

“…Slightly varying the procedure given in [13], three 200 nm scans were taken on each fin; four 50 nm areas from each scan were analysed. This produced a recommended sample size of 12.…”

Section: Sampling Statisticsmentioning

confidence: 99%

Atomic force microscope study of three-dimensional nanostructure sidewalls

Hussain¹,

Gondran²,

Michelson³

2007

Nanotechnology

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Next generation planar and non-planar complementary metal oxide semiconductor (CMOS) structures are three-dimensional nanostructures with multi-layer stacks that can contain films thinner than ten atomic layers. The high resolution of transmission electron microscopy (TEM) is typically chosen for studying properties of these stacks such as film thickness, interface and interfacial roughness. However, TEM sample preparation is time-consuming and destructive, and TEM analysis is expensive and can provide problematic results for surface and interface roughness. Therefore, in this paper, we present the use of direct measurements of sidewall surface structures by conventional atomic force microscopy (AFM) as an alternative or complementary method for studying multi-layer film stacks and as the preferred method for studying FinFET sidewall surface roughness. In addition to these semiconductor device applications, this AFM sidewall measurement technique could be used for other three-dimensional nanostructures.

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“…Therefore, other methods for measuring sidewall roughness are required. Several tools and methods were proposed in the literature [9,11]. However, all these methods are so far applied only to flat surfaces and not inside holes because of the influence of the hole curvature, or require special techniques or equipment which is not widely accessible.…”

Section: Introductionmentioning

confidence: 99%

“…In addition, as semiconductor device features continue to shrink, sidewall imaging and microroughness measurements are becoming increasingly valuable tools for process development. On smaller features, sidewall roughness, if not controlled, can become a significant contribution to the overall feature size [8][9]. Higher aspect ratios have increased the difficulty of measurement.…”

Section: Introductionmentioning

confidence: 99%

Characterization of sidewall roughness inside porous anodic alumina template holes by scanning electron microscopy

Han

Chen

Zhang

2011

2011 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems

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Resist line edge roughness (LER) and sidewall roughness of micro/nano structures are becoming important issues of increasing concern in the sub-100 nm fabrication regime due to their critical impact on device performance. LER and sidewall roughness metrology is used to monitor individual nanostructure fabrication. Porous anodic alumina (PAA) membranes are typical nanoscale templates and can be fabricated with different pore sizes through second oxide technique by changing the acid electrolyte and the anodization voltage. The LER of sidewall inside anodic porous alumina template holes has been evaluated by analyzing top-down scanning electron microscopy (SEM) images off-line. And RMS roughness (3 ) and height-height correlation function are used to characterize the sidewall roughness inside nanoscale holes of porous alumina template.

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Sidewall roughness measurement: a comparison of in- and off-line AFM techniques

Cited by 3 publications

References 3 publications

Electrical breakdown phenomena for devices with micron separations

Electrical breakdown phenomena for devices with micron separations

Atomic force microscope study of three-dimensional nanostructure sidewalls

Characterization of sidewall roughness inside porous anodic alumina template holes by scanning electron microscopy

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