This study presents and compares two original high-speed protection circuit methods, namely, i g integration and v gs derivation, against short-circuit types, referred to as, the hard switch fault and fault under load. Since the gate-drain capacitor C gd of a power device depends on the drain to source voltage v ds , it can become an original native sensor to monitor the switching operation and so detect the unwanted v ds transition or the absence of the v ds transition by monitoring only v gs . The use of only low-voltage monitoring, such as v gs , is an essential step to integrate fast and embedded new detection methods into a low-voltage application-specific integrated circuit gate driver, in particular for wide bandgap power transistors. The C gd capacitor plays a major part in the two detection methods. The first method is based on dedicated two-dimensional monitoring of the gate charge transferred in a time interval combined with gate voltage monitoring. The second method consists of the reconstruction of the dv gs /dt by means of a capacitive current sensing to provide the v gs derivation combined with the v gs monitoring. Comparison and simulation of the methods based on a C2M0025120D SiC MOSFET device under LTspice™ are made to verify the validity of the methods. In terms of detection speed of the short circuit, a detection time of 200 ns is obtained for both methods. Experimental waveforms based on C3M0120090J SiC MOSFET device were included into LTspice TM to push furthermore the methods to their limits and validate the approaches. Both methods are easy to design and to integrate. However, the robustness and the speed of detection trade-off of all these methods should be analysed and compared relative to the critical functionalities.