SiC MOSFET with built-in SBD for reduction of reverse recovery charge and switching loss in 10-kV applications

Jiang, Huaping; Wei, Jin; Dai, Xiaoping; Zheng, Changwei; Ke, Maolong; Deng, Xiaochuan; Sharma, Yogesh; Deviny, Ian; Mawby, Philip

doi:10.23919/ispsd.2017.7988890

Cited by 45 publications

(17 citation statements)

References 4 publications

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“…This means that a large W JFET makes the JBS diode more Schottky barrier diode (SBD)-like [28,29]. The large E J is undesirable regarding leakage current and reliability [30]. The trade-off between Schottky junction field E J (at the middle of Schottky contact between p-grids) in off-state and the V F of the SiC JBS diode with Schottky contact to p-grid is shown in Figure 7.…”

Section: Discussionmentioning

confidence: 99%

Investigation of Electrical Contacts to p-Grid in SiC Power Devices Based on Charge Storage Effect and Dynamic Degradation

Hua

Wei

2020

Electronics

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P-grid is a typical feature in power devices to block high off-state voltage. In power devices, the p-grid is routinely coupled to an external electrode with an Ohmic contact, but Schottky contact to the p-grid is also proposed/adopted for certain purposes. This work investigates the role of contact to p-grid in power devices based on the commonly adopted technology computer-aided design (TCAD) device simulations, with the silicon carbide (SiC) junction barrier Schottky (JBS) diode as a case study. The static characteristics of the JBS diode is independent of the nature of the contact to p-grid, including the forward voltage drop (VF) and the breakdown voltage (BV). However, during the switching process, a Schottky contact would cause storage of negative charges in the p-grid, which leads to an increased VF during switching operation. On the contrary, an Ohmic contact provides an effective discharging path for the stored negative charges in the p-grid, which eliminates the dynamic degradation issues. Therefore, the necessity of an Ohmic contact to p-grid in power devices is clarified.

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Section: Discussionmentioning

confidence: 99%

Investigation of Electrical Contacts to p-Grid in SiC Power Devices Based on Charge Storage Effect and Dynamic Degradation

Hua

Wei

2020

Electronics

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“…The small size and high reliability of the SiC MOSFET are both necessary to minish power dissipation and increase the efficiency. To avoid the aged deterioration effect, when the SiC MOSFET is used in the power system, usually paralleled with a Schottky barrier diode (SBD) [4][5][6][7], it may cause more energy dissipation and undesirable stray inductances. In order to obtain the optimised the reverse recovery performance and reduce switching loss, several papers have proposed several structures, for example, using a SBD paralleled with the SiC trench MOSFET [8][9][10][11][12].…”

Section: Introductionmentioning

confidence: 99%

SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss

Ran

Huang

et al. 2022

Micromachines

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A novel Silicon-Carbide heterojunction U-MOSFET embedded a P-type pillar buried in the drift layer (BP-TMOS) is proposed and simulated in this study. When functioning in the on state, the merged heterojunction structure will control the parasitic body diode, and the switching loss will decrease. Moreover, to lighten the electric field on the gate oxide corner, a high-doped L-shaped P+ layer near the heterojunction beneath the gate oxide was introduced; thus, the gate oxide reliability improved. A p-type pillar is introduced in the drift layer. The p-type pillar can assistant the drift layer to deplete. Thus, the specific on-resistance for BP-TMOS can be reduced with an increase in the N-drift region’s doping concentration. Compared to the traditional SiC MOSFET (C-TMOS), the specific on-resistance decreased by 20.4%, and the breakdown voltage increased by 53.7% for BP-TMOS, respectively. Meanwhile the device exhibits a 55% decrease and a 69.7% decrease for the switching loss and gate to drain charge.

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“…However, it adds a relatively large chip area. To integrate the JBS diode in the MOSFET cell, a lot of efforts have been made in [28]- [33]. SiC TMOSs with an integrated JBS diode between two trench gates were demonstrated in References [30] and [31], respectively.…”

Section: Introductionmentioning

confidence: 99%

A Novel SiC Asymmetric Cell Trench MOSFET With Split Gate and Integrated JBS Diode

Zhang

Chen

et al. 2021

IEEE J. Electron Devices Soc.

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A novel high performance SiC asymmetric cell trench MOSFET with split gate (SG) and integrated junction barrier schottky (JBS) diode (SGS-ATMOS) is proposed for the first time. The shielding effect provided by the SG structure not only reduces the gate-drain capacitance (C gd ) but also alleviates the electric field crowding in the dielectric layer at trench corner. The integrated trench JBS diode bypasses the PiN body diode while obtaining good double protection from the SG and p-type shielding region. Therefore, not only the MOSFET but also diode performance is significantly improved for the proposed structure. Numerical analysis results show that compared with the conventional asymmetric cell trench MOSFET (Con-ATMOS), the high frequency figure of merit (HFFOM 1 , R on • C gd ) is reduced by 92.5% and the Baliga figure of merit (BFOM, BV 2 /R on,sp ) is increased by 57.2%, respectively. In addition, the forward conduction voltage drop (V F ), reverse recovery charge (Q rr ) and peak reverse recovery current (I rrm ) of the diode are reduced from 3.10V, 1.95µC/cm 2 and 68.0A for the Con-ATMOS to 1.56V, 0.97µC/cm 2 and 35.9A for the proposed SGS-ATMOS, respectively. Compared with the Con-ATMOS, the turn-on loss (E on ) and turn-off loss (E off ) of the proposed device are reduced by 33.3% and 33.0%, respectively. The E on and E off of the proposed device are also 33.6% and 30.0% off compared with the Con-ATMOS with external JBS diode, respectively. The temperature characteristics of the SGS-ATMOS are also discussed and it is found that the proposed device exhibits good performance at high temperature.INDEX TERMS 4H-SiC, trench MOSFET, asymmetric cell, split gate, junction barrier Schottky (JBS), figure of merit (FOM), turn-on loss, turn-off loss.

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SiC MOSFET with built-in SBD for reduction of reverse recovery charge and switching loss in 10-kV applications

Cited by 45 publications

References 4 publications

Investigation of Electrical Contacts to p-Grid in SiC Power Devices Based on Charge Storage Effect and Dynamic Degradation

Investigation of Electrical Contacts to p-Grid in SiC Power Devices Based on Charge Storage Effect and Dynamic Degradation

SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss

A Novel SiC Asymmetric Cell Trench MOSFET With Split Gate and Integrated JBS Diode

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