Series-L/parallel-tuned class-E power amplifier analysis

Mury, T.; Fusco, V.F.

doi:10.1109/eumc.2005.1608890

Cited by 16 publications

(11 citation statements)

References 6 publications

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“…The optimal operation is also changed to zero-current switching (ZCS), where the current and its derivative goes smoothly to zero before the transistor enters nonconducting phase. Advantages of inverse class E over classical realization are that the drain peak voltages are lower than in classical class E and the inductance values in the output circuitry are smaller, which can save area in a MMIC chip implementation and can usually give smaller electrical series resistance (ESR) [4]. Also, the possibility to accommondate series inductance as a part of resonating circuitry is useful, since the parasitic reactances can cause undamped resonances to drain waveforms [6,7].…”

Section: Class E and Inverse Class E Amplifiersmentioning

confidence: 99%

“…6 A)-the inductor gets physically huge. To get reasonable on-chip component values the design was gradually deviated from the design procedure in [4] by shifting it towards lower load resistance and Q value, and increasing the resonance frequency. This ended up in a dimensioning that provides clean, nonoverlapping current and voltage pulses, reasonable size passives, but which is eventually closer to class C-E fundamental load [9] than to original inverse class E. The final component values of the simulation with discrete component models and an off-chip low-pass impedance matching network to 50 X resulted in the following dimensioning: resistive load 4 X; C tot ¼ 30 pF; L p ¼ 0:22 nH; and L so small it could be omitted from the final design.…”

Section: Design Of the Resonatormentioning

confidence: 99%

“…This fact has driven the interest of research towards more efficient amplifiers such as class E [1][2][3] and inverse class E [4]. Also, the demand of higher output power means higher peak currents and voltages in the drain or collector circuits.…”

Section: Introductionmentioning

confidence: 99%

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Design of integrated 1.6 GHz, 2 W tuned RF power amplifier

Hietakangas

Typpö

Rahkonen

2010

Analog Integr Circ Sig Process

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This paper describes the design of an integrated tuned power amplifier specified to operate at Inmarsat satellite uplink frequencies from 1626.5 to 1660.5 MHz. The basic topology of the amplifier lies on the parallel tuned inverse class E amplifier that is modified by placing the DC-blocking capacitor into a new position and by adjusting the size of the capacitor to improve stability below the desired band. Further, the new positioning reduces losses between drain and load. The high currents flowing in the circuit made it necessary to use wide inductor width and high-Q finger capacitors in the on-chip resonator. The amplifier was implemented as a Gallium Arsenide (GaAs) integrated circuit (IC) that delivered 2 W of output power while the drain efficiency was ca. 56%. Measurements included source and load pulls to further improve the performance of the amplifier and to investigate the stability at small input drive levels.

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Section: Class E and Inverse Class E Amplifiersmentioning

confidence: 99%

Section: Design Of the Resonatormentioning

confidence: 99%

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Design of integrated 1.6 GHz, 2 W tuned RF power amplifier

Hietakangas

Typpö

Rahkonen

2010

Analog Integr Circ Sig Process

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“…1 was chosen. The values of L, C p , C and L p can be calculated with equations shown in [6]. The value of the inductance L can Table I.…”

Section: B Design Of the Resonatormentioning

confidence: 99%

Integrated 1.6 GHz, 2W Tuned RF Power Amplifier

2008

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This paper demonstrates a tuned power amplifier designed to operate at 1.6 GHz frequency. The basis of the design is inverse class E topology where the DC block is placed in a new position so that the blocking capacitor can be smaller. Further, very high currents flowing into the output resonator had to be taken into account in the design process of a integrated circuit (IC). Wide inductor lines and multi-finger, high-Q capacitors were used to reduce the losses and maximize the current capability of the resonator. The implemented Gallium Arsenide (GaAs) IC delivers about 2 W of output power with drain efficiency of ca. 56 %.

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“…The DC block may be omitted, if it is acceptable to connect DC voltage to the load. Assuming an ideal and very large bypass capacitor C2, the resulting circuit has the same AC waveforms as the circuit of Figure 1, and the same equations for the component values are valid for both circuits [4].…”

Section: Choke-free Inverse Class E Amplifiermentioning

confidence: 99%

A 900 MHz 10 mW monolithically integrated inverse class E power amplifier

2010

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Abstract-This work demonstrates a new integrated inverse class E amplifier circuit, employing a pHEMT switching device and fully integrated output network for pulse shaping. The circuit is particularly suitable for full integration, since it does not need any RF choke for biasing, and no DC blocking capacitor is needed between the switch and the output network parallel resonance circuit. The back plate capacitances of the additional capacitors are not connected to nodes that carry RF voltage signals. A commercial GaAs monolithic microwave integrated circuit process was used for fabricating the prototype circuit. 11.5 mW output power and 39% drain efficiency with 0.9 V supply voltage was measured at 895 MHz operating frequency. The output power remains over 10mW across 850-925 MHz, and the drain efficiency remains above 32% across this frequency range.

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Series-L/parallel-tuned class-E power amplifier analysis

Cited by 16 publications

References 6 publications

Design of integrated 1.6 GHz, 2 W tuned RF power amplifier

Design of integrated 1.6 GHz, 2 W tuned RF power amplifier

Integrated 1.6 GHz, 2W Tuned RF Power Amplifier

A 900 MHz 10 mW monolithically integrated inverse class E power amplifier

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