Sequential lateral crystallization of amorphous silicon on glass by blue laser annealing for high mobility thin-film transistors

Jung, Young Hun; Hong, Seoung‐Jin; Lee, Suhui; Jin, Seonghyun; Kim, Tae‐Woong; Chang, Young Jin; Jang, Jin

doi:10.1016/j.tsf.2019.04.023

Cited by 22 publications

(23 citation statements)

References 28 publications

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“…3(b), the voltages of pixel nodes VP (1, 1) and VP (1,2) were distorted right after the programming, even if all TFTs were off. The LTPS TFTs exhibit much larger off-state leakage current than the oxide TFTs [8]- [10]. Thus, the LTPS TFTs could not maintain their gate voltages constantly for more than hundreds of milliseconds.…”

Section: Resultsmentioning

confidence: 99%

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P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

Kim

Chung

et al. 2020

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A new memory-in-pixel (MIP) circuit using oxide thin-film transistors (TFTs) to achieve low power consumption is proposed. The display employing the proposed pixel circuit can greatly reduce the power consumption due to extremely low leakage current of oxide semiconductor TFTs. By fabricating the circuit with oxide TFT process, the circuit performance under continuous operation is successfully verified without additional programming. The power consumption in the panel (except backlight) can be reduced to 0.03% of that of conventional LCD.

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Section: Resultsmentioning

confidence: 99%

“…Displays including the MIP circuits can decrease power consumption owing to their lower frame rate than that of conventional displays. It is well known that the oxide semiconductor TFTs exhibit extremely low off-state leakage current [8]- [10]. To utilize this property, a low frame-rate LCD using oxide TFT backplane was proposed [11].…”

Section: Introductionmentioning

confidence: 99%

P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

Kim

Chung

et al. 2020

Symp Digest of Tech Papers

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“…CW BLA uses longer melting time compared with excimer laser melting, and the absorption depth with a 445 nm blue laser is deeper than that of 308 nm excimer laser. It is found that the performance of BLA poly‐Si TFT using 100 nm a‐Si is much better than that using a 50 nm a‐Si layer because its grain size is larger . The advantage of BLA is using the wide thickness range of 50–200 nm.…”

Section: Introductionmentioning

confidence: 99%

“…The advantage of BLA is using the wide thickness range of 50–200 nm. Another important merit of BLA poly‐Si is no protrusion in the TFT channel . The grain boundary defects at the protrusion can degrade the TFT performance, and also affect the bias stability and mechanical bending stability .…”

Section: Introductionmentioning

confidence: 99%

Remarkable Improvement in Foldability of Poly‐Si Thin‐Film Transistor on Polyimide Substrate Using Blue Laser Crystallization of Amorphous Si and Comparison with Conventional Poly‐Si Thin‐Film Transistor Used for Foldable Displays

Jeong

Lee

et al. 2020

Adv Eng Mater

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Highly robust poly-Si thin-film transistor (TFT) on polyimide (PI) substrate using blue laser annealing (BLA) of amorphous silicon (a-Si) for lateral crystallization is demonstrated. Its foldability is compared with the conventional excimer laser annealing (ELA) poly-Si TFT on PI used for foldable displays exhibiting field-effect mobility of 85 cm 2 (V s) À1 . The BLA poly-Si TFT on PI exhibits the field-effect mobility, threshold voltage (V TH ), and subthreshold swing of 153 cm 2 (V s) À1 , À2.7 V, and 0.2 V dec À1 , respectively. Most important finding is the excellent foldability of BLA TFT compared with the ELA poly-Si TFTs on PI substrates. The V TH shift of BLA poly-Si TFT is %0.1 V, which is much smaller than that (%2 V) of ELA TFT on PI upon 30 000 cycle folding. The defects are generated at the grain boundary region of ELA poly-Si during folding. However, BLA poly-Si has no protrusion in the poly-Si channel and thus no defect generation during folding. This leads to excellent foldability of BLA poly-Si on PI substrate.

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“…BLA is conducted for the LT crystallization of a-Si on the glass. [36][37][38] The schematic diagram for the CMOS process flow using the coplanar structure of both LTPS and a-IGZO TFTs is shown in Figure 1a,b,d,e,g,h,j,k,m,n,p,q. Optical photographs of p-type and n-type active islands are shown in Figure 1c,f, respectively.…”

Section: Introductionmentioning

confidence: 99%

Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V⁻¹

et al. 2020

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The low-temperature polysilicon oxide (LTPO) complementary metal-oxidesemiconductor (CMOS) thin-film transistors (TFTs) is fabricated by p-type lowtemperature polysilicon (LTPS) TFT and n-type amorphous indium-gallium-zinc oxide (a-IGZO) TFT using coplanar structure. A double-stack SiO 2 layer deposited by high temperature first and then low-temperature process is used as a gate insulator for LTPS TFT, leading to reduce the number of photomask steps. The p-channel LTPS TFT of the fabricated LTPO circuits exhibits the field-effect mobility (μ FE) and threshold voltage (V TH) of 89.9 cm 2 (V s) À1 and À5.5 V, respectively. However, the a-IGZO TFT exhibits the μ FE of 22.5 cm 2 (V s) À1 and V TH of À1.3 V. Both the LTPS TFT and a-IGZO TFT show excellent bias stability (ΔV TH of <0.1 V) and zero hysteresis voltage, which reveals the excellent interface between gate insulator and semiconductor. The LTPO CMOS inverter exhibits a gain of 264.5 V V À1 and a high noise margin of 4.29 V, and a low noise margin of 3.69 V at V DD of 8 V. Therefore, the LTPO TFT technology developed in this work can be a promising candidate for low cost, large-area manufacturing of display, and TFT electronics.

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Sequential lateral crystallization of amorphous silicon on glass by blue laser annealing for high mobility thin-film transistors

Cited by 22 publications

References 28 publications

P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

Remarkable Improvement in Foldability of Poly‐Si Thin‐Film Transistor on Polyimide Substrate Using Blue Laser Crystallization of Amorphous Si and Comparison with Conventional Poly‐Si Thin‐Film Transistor Used for Foldable Displays

Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V⁻¹

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Sequential lateral crystallization of amorphous silicon on glass by blue laser annealing for high mobility thin-film transistors

Cited by 22 publications

References 28 publications

P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

P‐38: A New Pixel Architecture for Low‐Power LCDs with Oxide TFTs

Remarkable Improvement in Foldability of Poly‐Si Thin‐Film Transistor on Polyimide Substrate Using Blue Laser Crystallization of Amorphous Si and Comparison with Conventional Poly‐Si Thin‐Film Transistor Used for Foldable Displays

Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V−1

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Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V⁻¹