2020
DOI: 10.1002/adem.201901497
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Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V−1

Abstract: The low-temperature polysilicon oxide (LTPO) complementary metal-oxidesemiconductor (CMOS) thin-film transistors (TFTs) is fabricated by p-type lowtemperature polysilicon (LTPS) TFT and n-type amorphous indium-gallium-zinc oxide (a-IGZO) TFT using coplanar structure. A double-stack SiO 2 layer deposited by high temperature first and then low-temperature process is used as a gate insulator for LTPS TFT, leading to reduce the number of photomask steps. The p-channel LTPS TFT of the fabricated LTPO circuits exhib… Show more

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Cited by 29 publications
(15 citation statements)
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References 44 publications
(103 reference statements)
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“…Details of the coplanar single gate and dual gate TFT process are studied in our previous reports [8]- [9]. More details of the 6-mask LTPO fabrication process described in [2], [4]- [5]. The electrical properties of the TFTs were measured at room temperature using the Agilent 4156C semiconductor analyzer.…”
Section: Experimental Detailmentioning
confidence: 99%
See 1 more Smart Citation
“…Details of the coplanar single gate and dual gate TFT process are studied in our previous reports [8]- [9]. More details of the 6-mask LTPO fabrication process described in [2], [4]- [5]. The electrical properties of the TFTs were measured at room temperature using the Agilent 4156C semiconductor analyzer.…”
Section: Experimental Detailmentioning
confidence: 99%
“…By integrating these two TFT technologies it is possible to crisscross the disadvantages and take the advantages from both sides. The performance enhancement with the LTPO TFT technology has been reported with various circuits like pixel circuits [1], level shifter [2], inverter [4]- [5], operational amplifier [6], and TFTs array [7]. However, gate drive circuits with this technology not yet realized to the best of our knowledge.…”
Section: Introductionmentioning
confidence: 99%
“…LTPO TFTs with p-type BLA LTPS TFTs using coplanar structure and n-type a-IGZO TFTs using dual-gate back channel etch (BCE) structure have been fabricated with the detailed process described in [8][9][10]. Fig.…”
Section: Tft Fabricationmentioning
confidence: 99%
“…Furthermore, in recently, hybrid TFTs technology, named as low-temperature processed poly-Si and OS (LTPO) TFTs, is used for mobile displays in order to satisfy the requirements of high-mobility LTPS TFTs for peripheral drivers and the OS TFTs with extremely low-off current for pixel drivers. 7) However, the LTPO process is complicated and required additional mask steps. Therefore, the development of high-mobility OS TFTs is of great importance to achieve simple and cost-effective TFT array for future displays.…”
Section: Introductionmentioning
confidence: 99%