Self-Calibrating Networks-On-Chip

Abstract

Abstract-Networks-on-chip provide an elegant framework to efficiently reuse predesigned cores. However, reuse of cores is jeopardized by new deep sub-micron noise effects that challenge reliability of CMOS technology. Moreover, noise margins are further reduced as supply voltage scale down. We advocate that self-calibrating techniques will be needed to maintain acceptable design trade-off between energy, performance, and reliability. As a result, self-calibrating techniques have to be integrated within networks-on-chip. This paper presents a selfcalibrating link and discusses qualitatively the problem of controlling adaptively its voltage and frequency.

Comprehensive online defect diagnosis in on-chip networks

“…Other methods such as Automatic Repeat reQuest (ARQ) can address both data and control errors as well. ARQ methods ensure that each packet reaches its destination without error by monitoring and retransmission [25]. However, these techniques cannot effectively handle permanent faults.…”