Self‐biased nano‐power four‐transistor current and voltage reference with a single resistor

Abstract

A generic nano‐power voltage and current reference topology, which takes advantage of the unequal threshold voltage (VnormalTH) of two MOSFETs in subthreshold region, is developed to provide reliable bias and reference signals for the analogue integrated blocks used in the Internet‐of‐Things applications. The new architecture is a self‐powered four‐transistor topology with a single temperature‐insensitive resistor, generating both temperature‐independent voltage and current without any operational amplifier or bias network. Instead, the resistor defines the absolute value of the current reference (InormalREF) which supplies the core devices. The circuit is designed and simulated for a target current reference of 7.50 nA in 0.18 µm CMOS process, and achieves a worst‐case temperature coefficient (TC) of 59.47 ppm/°C over a temperature range from −40 to 125°C and 1.8 V voltage supply. The average voltage reference (VnormalREF) is 346 mV, and the worst‐case TC of different corners is 21.98 ppm/°C. The nominal current consumption is twice the InormalREF (15 nA) regardless of the supply and temperature, and can be scaled down by reducing the desired current reference.

Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices

“…In this work, we developed a nano-power current and voltage reference with curvature compensation without amplifiers. The voltage reference comes from unequal threshold voltages of different nMOS devices, while the current 17 Aminzadeh a (2020) 5 Lee (2020) 18 Thakur a (2020) 36 Nagulapalli a (2021) 37 Technology 0. How to cite this article: Aminzadeh H. Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices.…”

“…then established by the V REF drop across R 1 with low sensitivity to temperature. 4,5 Transistors M 3 À M 4 form a current mirror in the top, linking the branch currents of M 1 and M 2 according to…”

“…2 is a process-and temperaturedependent current with μ as the carrier mobility and C ox as the gate-oxide capacitance per unit area. The effect of V DS can be neglected for the voltages beyond 4 Â V T , yielding the following V REF expression 5 :…”

“…Low‐power CMOS references are implemented using the MOS transistors operating in subthreshold regime. As such, well‐defined current and voltage references may be established based on the combination of MOS devices with unequal threshold voltages ( ), 4–6 n MOS and p MOS, 7 MOS devices and poly resistors, 8,9 or standard n MOS transistors 10 . Regardless of the configuration, however, the TC of the output will be much higher than 10 ppm/°C when no curvature correction is applied to suppress the high‐order temperature‐dependent terms.…”

Hybrid cascode compensation with Q-factor control module for three-stage OTAs driving ultra-large load capacitors

“…Operational transconductance amplifiers (OTAs) are the core building blocks of analog and mixed-signal integrated circuits such as G m -C and RC filters, audio amplifiers, liquid crystal diode (LCD) drivers, low-dropout regulators (LDOs), switched-capacitor (SC) amplifiers and filters, DC-DC and data converters and voltage and current references (Ruiz-Amaya et al, 2011;Tsai and Wang, 2011;Hinojo et al, 2018;Mohan and Furth, 2012;Grasso et al, 2014;Aminzadeh and Serdijn, 2011;Grasso et al, 2018b, Payandehnia et al, 2018Aminzadeh, 2020a, Biabanifard et al, 2018. The limited DC gain restricts the overall accuracy of the above-stated units which contain, at least, one OTA in feedback configuration.…”