Self-Aligned Top-Gate Coplanar In-Ga-Zn-O Thin-Film Transistors

Wu, Chao−Hsin; Hsieh, Hsing‐Hung; Chien, Ching‐Piao; Wu, Chung‐Chih

doi:10.1109/jdt.2009.2026189

Cited by 68 publications

(47 citation statements)

References 19 publications

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“…Subpeaks near 530 and 550 nm were revealed after the application of Gaussian fitting to the spectra. Though the correspondence between the PL peaks and their responsible defect types in ZnO has yet to be conclusively confirmed [9]- [12], [22], [23], there is evidence [1], [12], [24] for the respective assignment of the ∼530 and ∼550-nm peaks to the Zn i and V O donor-like defects [1], [19]- [21].…”

Section: A Formation Mechanisms Of the Annealing-induced Donors In Tmentioning

confidence: 98%

“…The possibility of Sample ON being doped with extrinsic dopants was first investigated and eliminated. Hydrogen (H) and nitrogen (N) were the mostly likely suspects, since PECVD SiN x is known as a rich source of H [24], [25], a shallow donor in ZnO, and N, possibly from the NH 3 -containing ambience used for the PECVD of SiN x . The Samples ON annealed at different temperatures were analyzed using SIMS.…”

Section: B Formation Mechanism Of the Annealing-induced Donors In Samentioning

confidence: 99%

“…11) by Gaussian fitting. While the former has already been identified with V O , the latter is commonly assigned to the donor-like Zn O [1], [12], [24].…”

Section: B Formation Mechanism Of the Annealing-induced Donors In Samentioning

confidence: 99%

See 2 more Smart Citations

The Resistivity of Zinc Oxide Under Different Annealing Configurations and Its Impact on the Leakage Characteristics of Zinc Oxide Thin-Film Transistors

Lü

Wong

2014

IEEE Trans. Electron Devices

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Abstract-Sputtered zinc oxide (ZnO) without intentional doping was thermally annealed and the dependence of its resistivity on different sample configurations and heat-treatment conditions was studied. The ZnO was either exposed to the ambience or sealed with an impermeable cover during the annealing. The resistivity resulting from the sealed configuration was found to be lower. The possible origins of the charge carriers responsible for the conductivity were investigated, with the most plausible one studied in greater detail using photoluminescence. The leakage current in the OFF-state of a field-effect thin-film transistor is largely controlled by the residual conductivity of the channel region of the transistor. For a ZnO transistor, this region is typically undoped and subjected to a series of thermal processes under a variety of coverage configurations during the course of the fabrication of the transistor. The implied correlation between the aggregate thermal treatment and the characteristics of a transistor in its OFF-state was investigated and demonstrated.

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Section: A Formation Mechanisms Of the Annealing-induced Donors In Tmentioning

confidence: 98%

Section: B Formation Mechanism Of the Annealing-induced Donors In Samentioning

confidence: 99%

See 1 more Smart Citation

The Resistivity of Zinc Oxide Under Different Annealing Configurations and Its Impact on the Leakage Characteristics of Zinc Oxide Thin-Film Transistors

Lü

Wong

2014

IEEE Trans. Electron Devices

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“…Since hydrogen (H) in ZnO is a shallow interstitial dopant [12] that can readily be activated at relatively low temperature, technologies for realizing self-aligned TFTs with H-doped source/drain (S/D) regions have already been reported [13]- [16]. Silicon nitride formed using plasma-enhanced chemical vapor deposition (PECVD) is commonly employed as a passivation layer.…”

Section: Introductionmentioning

confidence: 99%

“…The diffusion at such temperature of an excessive amount of H from the S/D into the channel region of a TFT may lead to an unacceptably high OFF-state leakage current [16], particularly for shorter-channel TFTs. Consequently, there is a tradeoff between limiting H diffusion and enhancing device stability.…”

Section: Introductionmentioning

confidence: 99%

Zinc-Oxide Thin-Film Transistor With Self-Aligned Source/Drain Regions Doped With Implanted Boron for Enhanced Thermal Stability

Yang

Lü

Wong

2012

IEEE Trans. Electron Devices

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Abstract-Because of the rapid diffusion of hydrogen in zinc oxide even at a relatively low temperature, zinc-oxide-based thinfilm transistors (TFTs) with hydrogen-doped source/drain regions suffer from degraded thermal stability. The use of boron, which is a heavier and a more slowly diffusing dopant, is systematically investigated as a replacement of hydrogen. Its effectiveness as a dopant has been studied in terms of a range of process conditions, including its implantation dosage and the subsequent heat treatment temperature, time, and ambience. The lowest resistivity of 2 mΩ-cm has been obtained at a boron dose of 10 16 /cm 2 . Self-aligned top-gated zinc-oxide TFTs with source/drain regions doped with implanted boron are shown to be more stable than those doped with hydrogen, even when subjected to the relatively high temperature needed for the formation of a good-quality passivation layer.

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Contact‐Engineering of Self‐Aligned‐Gate Metal Oxide Transistors Processed via Electrode Self‐Delamination and Rapid Photonic Curing

Luo,

Faber,

Liu

et al. 2024

Adv Funct Materials

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Metal oxide thin‐film transistors (TFTs) offer remarkable opportunities for applications in emerging transparent and flexible microelectronics. Unfortunately, their performance is hindered by limitations associated with parasitic effects, such as parasitic electrode overlap capacitances and high contact resistance, which can severely limit their dynamic behavior. Here, an innovative method is reported to fabricate coplanar self‐aligned‐gate (SAG) indium‐gallium‐zinc‐oxide (IGZO) transistors with engineered source/drain contacts. The manufacturing process starts with the deposition and patterning of a gate electrode/dielectric stack and its functionalization with an organic self‐assembled monolayer (SAM) as the surface energy modifier. A second gold (Au) electrode is subsequently deposited over the gate electrode stack. The overlapping region between the two electrodes is removed via self‐delamination under mild sonication, forming perfectly aligned coplanar Au‐Gate‐Au electrodes. Device fabrication is completed with the spin coating of the IGZO precursor, followed by rapid photonic curing. Replacing the gold source/drain contact with bimetallic electrodes such as Au/In and Au/ITO enables a reduction in contact resistance and improves the transistor performance remarkably without increasing manufacturing complexity. The method is highly scalable, robust, and applicable to other semiconductor materials.

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Self-Aligned Top-Gate Coplanar In-Ga-Zn-O Thin-Film Transistors

Cited by 68 publications

References 19 publications

The Resistivity of Zinc Oxide Under Different Annealing Configurations and Its Impact on the Leakage Characteristics of Zinc Oxide Thin-Film Transistors

The Resistivity of Zinc Oxide Under Different Annealing Configurations and Its Impact on the Leakage Characteristics of Zinc Oxide Thin-Film Transistors

Zinc-Oxide Thin-Film Transistor With Self-Aligned Source/Drain Regions Doped With Implanted Boron for Enhanced Thermal Stability

Contact‐Engineering of Self‐Aligned‐Gate Metal Oxide Transistors Processed via Electrode Self‐Delamination and Rapid Photonic Curing

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