Selective area etching of InP with CBr4 in MOVPE

Ebert, Chris; Levkoff, J.; Roberts, J.S.; Seiler, Joseph; Wanamaker, C.; Pinnington, T.

doi:10.1016/j.jcrysgro.2006.10.121

Cited by 10 publications

(11 citation statements)

References 5 publications

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“…In-situ etching studies of InP-based alloys using metal organic vapor phase epitaxy (MOVPE) were reported for opto-electronic applications, mostly by means of halogenbased etching agents: HCl [7][8][9], tertiarybutylchloride [10,11], various chlorocarbons [12], CBr 4 [13], PCl 3 [14]. Recently, Selective Area Etching (SAE) of InP open areas between two closely spaced silicon dioxide pads was also investigated [13,14]: bulk InP (100) wafers patterned with 1000 µm long silicon dioxide pad pairs and with width varying from 10 to 60 µm were chosen as the substrate and the etch rate dependence on various process parameters as well as on pad width was assessed.…”

Section: Introductionmentioning

confidence: 99%

“…Recently, Selective Area Etching (SAE) of InP open areas between two closely spaced silicon dioxide pads was also investigated [13,14]: bulk InP (100) wafers patterned with 1000 µm long silicon dioxide pad pairs and with width varying from 10 to 60 µm were chosen as the substrate and the etch rate dependence on various process parameters as well as on pad width was assessed.…”

Section: Introductionmentioning

confidence: 99%

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In Situ HCl Etching of InP in Shallow-Trench-Isolated Structures

Orzali¹,

Wang

Waldron³

et al. 2011

ECS Trans.

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CMOS scaling for sub-12 nm nodes will need high-mobility channel semiconductors such as III-V materials to be integrated on large diameter Si substrates. A way to overcome lattice mismatch is to confine defects resulting from strain relaxation on the sidewalls of trenches made by etch-back of Si in standard ShallowTrench-Isolation (STI) structures. The surface of the InP layers, grown as buffer material in these trenches by selective epitaxy, is planarized by means of CMP, after which it needs to be recessed to allow for the deposition of the III-V channel stack. We have developed an in-situ HCl etching process allowing a close control of the recess depth down to a few nm and leaving a clean and planar InP surface well suited for subsequent III-V epitaxial growth. The process development was carried out in a commercial Aixtron Crius MOCVD reactor on standard SiO 2 STI patterned 200 mm Si (001) wafers.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

In Situ HCl Etching of InP in Shallow-Trench-Isolated Structures

Orzali¹,

Wang

Waldron³

et al. 2011

ECS Trans.

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“…Techniques like selective area growth (SAG) are well established in the field of InP-based optoelectronics [1]. Also for GaAsbased laser diodes re-growth processes are becoming important [2].…”

Section: Introductionmentioning

confidence: 99%

In-situ etching of GaAs/AlxGa1−xAs by CBr4

Maaßdorf

Weyers

2008

Journal of Crystal Growth

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“…In situ etching of compound semiconductors in a MOCVD reactor has been reported for a variety of precursors and materials [1][2][3][4][5][6][7][8][9]. Advantages of in situ etching are reduction of impurities at the substrate/epitaxial layer interface [7,9], improved planarity of selective area growth (SAG) areas by reduction of enhanced material growth near a mask edge [5,6,8], and improvement in surface morphology [6,7].…”

Section: Introductionmentioning

confidence: 99%

“…Advantages of in situ etching are reduction of impurities at the substrate/epitaxial layer interface [7,9], improved planarity of selective area growth (SAG) areas by reduction of enhanced material growth near a mask edge [5,6,8], and improvement in surface morphology [6,7]. In particular, in situ etching of InP with phosphorous trichloride (PCl 3 ) is an attractive process because it produces phosphorous on pyrolysis aiding preservation of the InP surface, and it provides an etch rate comparable to typical ex situ InP etchants.…”

Section: Introductionmentioning

confidence: 99%

Selective area etching of InP with PCl3 in MOVPE

Ebert

Bond

Cao

et al. 2007

Journal of Crystal Growth

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We report on in situ etching of planar and masked InP wafers using phosphorous trichloride (PCl 3 ) in a metal organic vapor phase epitaxy (MOVPE) reactor at different pressures and temperatures using a design of experiment (DOE) approach. In situ etching of a masked wafer shows an increase in etch rate between two closely spaced oxide pads and is referred to as selective area etching (SAE). InP etch rate of planar wafers increased for higher reactor temperatures and pressures over the parameter space evaluated as measured by in situ optical reflectance. InP selective area etch rate and etch rate enhancement also increased with higher reactor temperatures and pressures as measured by Dektak profilometry. Two-dimensional (2-D) modeling of SAE based on vapor phase diffusion of PCl 3 shows reasonable agreement with actual measurements. From the 2-D modeling, D/k values were determined and varied from 54 to 120 mm over the reactor parameter space examined. Highest reactor temperature and lowest reactor pressure resulted in the largest D/k value. Pre-etching masked InP wafers with PCl 3 reduce the effect of excessive edge growth enhancement in subsequent selective area growth (SAG) and improves wafer planarity that is beneficial to the fabrication of integrated optoelectronic devices. r

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Selective area etching of InP with CBr4 in MOVPE

Cited by 10 publications

References 5 publications

In Situ HCl Etching of InP in Shallow-Trench-Isolated Structures

In Situ HCl Etching of InP in Shallow-Trench-Isolated Structures

In-situ etching of GaAs/AlxGa1−xAs by CBr4

Selective area etching of InP with PCl3 in MOVPE

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