Security, Reliability and Test Aspects of the RISC-V Ecosystem

Abstract

RISC-V has emerged as a viable solution on academia and industry. However, to use open source hardware for safety-critical applications, we need a deep understanding of the way in which well established mechanisms for testing and reliability could be integrated and deployed on the RISC-V ecosystem, and we need a clear knowledge on how such an ecosystem can be leveraged to improve security. This paper includes four contributions presenting the potential of RISC-V in security research, the way in which RISC-V can be hardened against power analysis attacks, how to implement, using RISC-V, software and hardware/software solutions for dual core lock step, and how to perform system-level testing in the RISC-V ecosystem.

A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors

“…The survey in [20] presents ISA extensions designed by the RISC-V community and the progress of official RISC-V ISA extension specifications. Abella et al [21] provided an overview of why RISC-V is successful and some contributions on RISC-V and security against sidechannel attacks, a dual core LockStep system with diverse redundancy, and System-Level Test.…”