Scaling Trends and Tradeoffs between Short Channel Effect and Channel Boosting Characteristics in Sub-20 nm Bulk/Silicon-on-Insulator NAND Flash Memory

Abstract

The scaling trends and limitation in sub-20 nm a bulk and silicon-on-insulator (SOI) NAND flash memory is studied by the three-dimensional (3D) device simulation focusing on short channel effects (SCE), channel boost leakage and channel voltage boosting characteristics during the program-inhibit operation. Although increasing punch-through stopper doping concentration is effective for suppressing SCE in bulk NAND cells, the generation of junction leakage becomes serious. On the other hand, SCE can be suppressed by thinning the buried oxide (BOX) in SOI NAND cells. However, the boosted channel voltage decreases by the higher BOX capacitance. It is concluded that the scaling limitation is dominated by the junction leakage and channel boosting capability for bulk and SOI NAND flash cells, respectively, and the scaling limit is decreased to 9 nm using SOI NAND flash memory cells from 13 nm in bulk NAND flash memory cells.

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

“…Differently from that the channel doping of W/L cells in scaled 2D NAND flash memory ranges from several times 10 17 to $10 18 cm À3 , the channel doping of 3D W/L cells is quite low ($10 15 cm À3 or less). [12][13][14][15][16][17] Therefore, the band bending of boosted channel during inhibit mode in 3D stack NAND flash memory is localized in the body near the gate edge of the SSL device adjacent to the edge W/L of the inhibit cell while the band bending spreads in the space between the edge W/L cell and the SSL device in 2D NAND flash memory. The localized band bending generates significantly electron-hole pairs which deteriorates the channel boosting and finally increases program disturbance.…”

Development of sacrificial layer wet etch process of TiNi for nano-electro-mechanical device application

“…Typically, conventional CMOS devices including static random access memory (SRAM), dynamic random access memory (DRAM), and flash memory have suffered from problems such as leakage current and short channel effects [1,2]. At this point, nano electro mechanical non-volatile memory which is one of the promising next generation non-volatile memories, have been investigated intensively [3].…”