Scalable GaSb/InAs Tunnel FETs With Nonuniform Body Thickness

Abstract

GaSb/InAs heterojunction tunnel field-effect transistors are strong candidates in building future low-power integrated circuits, as they could provide both steep subthreshold swing and large ON-state current (I ON ). However, at short channel lengths they suffer from large tunneling leakage originating from the small band gap and small effective masses of the InAs channel. As proposed in this article, this problem can be significantly mitigated by reducing the channel thickness meanwhile retaining a thick source-channel tunnel junction, thus forming a design with a non-uniform body thickness. Because of the quantum confinement, the thin InAs channel offers a large band gap and large effective masses, reducing the ambipolar and source-to-drain tunneling leakage at OFF state. The thick GaSb/InAs tunnel junction, instead, offers a low tunnel barrier and small effective masses, allowing a large tunnel probability at ON state. In addition, the confinement induced band discontinuity enhances the tunnel electric field and creates a resonant state, further improving I ON . Atomistic quantum transport simulations show that ballistic I ON = 284A/m is obtained at 15nm channel length, I OFF = 1 × 10 −3 A/m, and V DD = 0.3V. While with uniform body thickness, the largest achievable I ON is only 25A/m. Simulations also indicate that this design is scalable to sub-10nm channel length.Tunnel field-effect transistor (TFET), a promising replacement of classical metal-oxide-semiconductor fieldeffect transistor (MOSFET) for future low-power integrated circuits, has been intensively studied over a decade. The advantages of TFET come from its steep subthreshold swing (SS) that overcomes the 60mV/dec limit of a conventional MOSFET, allowing substantial supply voltage (V DD ) scaling 1 . However, because of low tunnel probability the steep SS usually occurs at very low current level 2,3 . This leads to insufficient ON-state current (I ON ) and thus large switching delay (CV DD /I ON ). Various approaches have been proposed to improve the low I ON . In particular, GaSb/InAs heterojunction based TFETs can considerably boost I ON due to their broken/staggered-gap band alignment 4,5 .However, as the channel length scales to sub-20nm as projected by International Technology Roadmap for Semiconductors (ITRS) for the next technology nodes 6 , the GaSb/InAs n-type TFETs suffer from large ambipolar and source-to-drain tunneling leakage due to the small band gap and the small effective masses of the InAs channel. These leakage can be reduced by reducing the body thickness 7 , because the band gap and the effective masses of the InAs channel increase as the body thickness decreases. Meanwhile, the large band gap and large effective masses also reduce the tunneling probability across the tunnel junction. The resonant TFET with a reversed InAs/GaSb heterojunction can have a steep SS at short gate length 7 but the I ON is limited by the narrow resonant transmission peak 8 . The channel heterojunction design with a large band-gap AlInAsSb alloy as the...

A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

“…Here, the RGF calculations for different transverse momentum k y and energy E are distributed over different CPU cores. Then, nonlinear equations (6) and (7), together with boundary conditions E F,0 = E F,L and E F,N +1 = E F,R (E F,L and E F,R are the Fermi levels of the left and right contacts), are solved iteratively using the Newton method to find E F,l . Note that the Jacobian matrix is sparse and can be calculated analytically (derivative of the Fermi-Dirac function).…”

“…The low tunneling probability problem of TFETs can be mitigated by employing staggered-or brokengap heterojunction (HJ) for the tunnel junction to reduce the tunnel barrier height and tunnel distance [2]- [4]. However, even for broken-gap GaSb/InAs HJ TFETs, the tunnel probability is low due to quantum confinement induced band gap overlap [5]- [7]. A number of designs have been proposed to further improve the performance of the GaSb/InAs HJ TFETs [5]- [14].…”

A temperature‐dependent surface potential‐based algorithm for extraction of threshold voltage in homojunction TFETs

“…The effect of temperature is considered in the analytical model through the expression of energy band gap, and in the conditions (5) and (6). The algorithm is further modified as per (5) and (6), and the ultimate condition for computing the threshold voltage is given by (7) which considers ΔE G (T). The validity of the surface potential at temperatures 500 and 700 K for the 3 architectures is shown in Figure 7.…”

“…3 Numerous strategies have been adopted so far in terms of device geometry and materials in order to address the problem in these tunneling transistors. Of them, double gate (DG) TFETs, 4 heterojunction (HJ) TFETs, [5][6][7][8][9][10] cylindrical TFETs, 11 dual metal gate TFETs, 12 Carbon Nanotube (CNT) TFETs, 13 III-V TFETs, 14 and gate engineered TFETs 15 are the most significant.…”

A Novel Planar Architecture for Heterojunction TFETs With Improved Performance and Its Digital Application as an Inverter

“…In [14], a new resonant-TFET (R-TFET) is proposed, and a 100x current advantage over the MOSFET is obtained. In [15], a scalable GaSb/InAs TFET with nonuniform body thickness is introduced, and a high I ON of approximately 284 A/m is exhibited. All of these studies are excellent works, and the device performance is largely enhanced by different structural innovations and heterojunctions with much lower tunneling barriers compared with that of the homojunction.…”